Sfoglia per Autore
Simulation of an improved neural based A/D converter
1993-01-01 Cappuccino, Gregorio; Corsonello, P.
Design and demonstration of a real time processor for one-bit coded SAR signals
1996-01-01 Cappuccino, Gregorio; Cocorullo, Giuseppe; Corsonello, Pasquale; Schirinzi, G.
Real-Time Processing of one-bit-coded SAR data
1996-01-01 Cappuccino, G.; Cocorullo, G.; Corsonello, Pasquale; Schirinzi, G.
Real-time processing of one-bit coded SAR data
1996-01-01 Cappuccino, Gregorio; Corsonello, Pasquale; Cocorullo, G.; Schirinzi, G.
Real-time processing of one-bit-coded SAR data
1996-01-01 Cappuccino, G; Cocorullo, Giuseppe; Corsonello, Pasquale; Schirinzi, G.
Design and demonstration of high throughput square rooting circuit
1996-01-01 Cappuccino, Gregorio; Corsonello, Pasquale; Cocorullo, Giuseppe
integrato digitale per operazioni di somma binaria in sistemi asincroni ad alta velocità
1998-01-01 Cocorullo, G.; Corsonello, Pasquale; Perri, S.
High performance VLSI modules for division and square root
1998-01-01 Cappuccino, Gregorio; Corsonello, Pasquale; Cocorullo, Giuseppe
CMOS buffer sizing for long on-chip interconnects
1998-01-01 Cappuccino, Gregorio; Cocorullo, Giuseppe; Corsonello, Pasquale
Circuito integrato digitale per operazioni di somma binaria in sistemi asincroni ad alta velocità
1998-01-01 Cocorullo, G.; Corsonello, P.; Perri, Stefania
Estimation of power dissipation for lossy transmission lines in high speed VLSI CMOS circuits
1998-01-01 Cappuccino, Gregorio; Corsonello, Pasquale; Cocorullo, G.
Efficient VLSI implementation of statistical carry lookahead adder
1998-01-01 Corsonello, Pasquale; Perri, Stefania; Cocorullo, Giuseppe
High throughput combined division square root unit
1998-01-01 Corsonello, Pasquale; Cappuccino, Gregorio; Cocorullo, Giuseppe
A 56-bit self-timed adder for high speed asynchronous datapath
1999-01-01 Corsonello, Pasquale; Perri, S; Cocorullo, Giuseppe
High performance square rooting circuit using hybrid radix-2 adders
1999-01-01 Corsonello, Pasquale; Perri, Stefania
Educational design of high-performance arithmetic circuits on FPGA
1999-01-01 Cappuccino, Gregorio; Cocorullo, Giuseppe; Corsonello, Pasquale; Perri, S.
Educational Design of high performance arithmetic circuits
1999-01-01 Cappuccino, G; Cocorullo, G; Corsonello, Pasquale; Perri, Stefania
A New High Performance Circuit for Statistical Carry Lookahead Addition
1999-01-01 Corsonello, Pasquale; Perri, S.; Cocorullo, Giuseppe
56-bit self-timed adder for high speed asynchronous datapaths
1999-01-01 Corsonello, Pasquale; Perri, Stefania; Cocorullo, G.
Estimation of power dissipation for transmission lines in deep-submicrometer ULSI circuits
1999-01-01 Cappuccino, Gregorio; Cocorullo, G; Corsonello, Pasquale
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| Simulation of an improved neural based A/D converter | 1-gen-1993 | Cappuccino, Gregorio; Corsonello, P. | |
| Design and demonstration of a real time processor for one-bit coded SAR signals | 1-gen-1996 | Cappuccino, Gregorio; Cocorullo, Giuseppe; Corsonello, Pasquale; Schirinzi, G. | |
| Real-Time Processing of one-bit-coded SAR data | 1-gen-1996 | Cappuccino, G.; Cocorullo, G.; Corsonello, Pasquale; Schirinzi, G. | |
| Real-time processing of one-bit coded SAR data | 1-gen-1996 | Cappuccino, Gregorio; Corsonello, Pasquale; Cocorullo, G.; Schirinzi, G. | |
| Real-time processing of one-bit-coded SAR data | 1-gen-1996 | Cappuccino, G; Cocorullo, Giuseppe; Corsonello, Pasquale; Schirinzi, G. | |
| Design and demonstration of high throughput square rooting circuit | 1-gen-1996 | Cappuccino, Gregorio; Corsonello, Pasquale; Cocorullo, Giuseppe | |
| integrato digitale per operazioni di somma binaria in sistemi asincroni ad alta velocità | 1-gen-1998 | Cocorullo, G.; Corsonello, Pasquale; Perri, S. | |
| High performance VLSI modules for division and square root | 1-gen-1998 | Cappuccino, Gregorio; Corsonello, Pasquale; Cocorullo, Giuseppe | |
| CMOS buffer sizing for long on-chip interconnects | 1-gen-1998 | Cappuccino, Gregorio; Cocorullo, Giuseppe; Corsonello, Pasquale | |
| Circuito integrato digitale per operazioni di somma binaria in sistemi asincroni ad alta velocità | 1-gen-1998 | Cocorullo, G.; Corsonello, P.; Perri, Stefania | |
| Estimation of power dissipation for lossy transmission lines in high speed VLSI CMOS circuits | 1-gen-1998 | Cappuccino, Gregorio; Corsonello, Pasquale; Cocorullo, G. | |
| Efficient VLSI implementation of statistical carry lookahead adder | 1-gen-1998 | Corsonello, Pasquale; Perri, Stefania; Cocorullo, Giuseppe | |
| High throughput combined division square root unit | 1-gen-1998 | Corsonello, Pasquale; Cappuccino, Gregorio; Cocorullo, Giuseppe | |
| A 56-bit self-timed adder for high speed asynchronous datapath | 1-gen-1999 | Corsonello, Pasquale; Perri, S; Cocorullo, Giuseppe | |
| High performance square rooting circuit using hybrid radix-2 adders | 1-gen-1999 | Corsonello, Pasquale; Perri, Stefania | |
| Educational design of high-performance arithmetic circuits on FPGA | 1-gen-1999 | Cappuccino, Gregorio; Cocorullo, Giuseppe; Corsonello, Pasquale; Perri, S. | |
| Educational Design of high performance arithmetic circuits | 1-gen-1999 | Cappuccino, G; Cocorullo, G; Corsonello, Pasquale; Perri, Stefania | |
| A New High Performance Circuit for Statistical Carry Lookahead Addition | 1-gen-1999 | Corsonello, Pasquale; Perri, S.; Cocorullo, Giuseppe | |
| 56-bit self-timed adder for high speed asynchronous datapaths | 1-gen-1999 | Corsonello, Pasquale; Perri, Stefania; Cocorullo, G. | |
| Estimation of power dissipation for transmission lines in deep-submicrometer ULSI circuits | 1-gen-1999 | Cappuccino, Gregorio; Cocorullo, G; Corsonello, Pasquale |
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