In this paper, a new miniaturized design of on-chip 4×4 Butler matrix implemented in SiGe BiCMOS technology is presented. The proposed Butler matrix was designed using two different approaches operating at the same frequency of 5.5 GHz. In a first example, a miniaturized lumped element design was implemented by increasing the density of the individual elements on the chip. A reduction of the chip area was achieved by simulating the entire structure with FEM based commercial software and by carefully evaluating mutual coupling effects. In a second design, a more innovative approach was taken into account by implementing the 90 degree hybrid through an on-chip transformer. Thanks to this solution, it was possible to achieve a considerable reduction of the chip area and an improvement of the Butler matrix performance both in terms of phase linearity and in terms of operating bandwidth. © 2015 EurAAP.
A BiCMOS 4×4 Butler matrix
BOCCIA, LUIGI;AMENDOLA, Gian Domenico
2015-01-01
Abstract
In this paper, a new miniaturized design of on-chip 4×4 Butler matrix implemented in SiGe BiCMOS technology is presented. The proposed Butler matrix was designed using two different approaches operating at the same frequency of 5.5 GHz. In a first example, a miniaturized lumped element design was implemented by increasing the density of the individual elements on the chip. A reduction of the chip area was achieved by simulating the entire structure with FEM based commercial software and by carefully evaluating mutual coupling effects. In a second design, a more innovative approach was taken into account by implementing the 90 degree hybrid through an on-chip transformer. Thanks to this solution, it was possible to achieve a considerable reduction of the chip area and an improvement of the Butler matrix performance both in terms of phase linearity and in terms of operating bandwidth. © 2015 EurAAP.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
