A high flexible early-late gate bit synchronizer in FPGA-based software defined radios

The more increasing necessity of integration inside digital systems together with the advantages in terms of portability, reduced time-to-market, better flexibility and versatility, lead towards integrated all-digital FPGA based communication systems. Bit synchronization is a fundamental operation required for the best symbol detection. A high flexible Early-Late Gate implementation is proposed, it is optimized for low resource consumption in FPGA implementations.