Here we present different preliminary parallel grid-based implementations of a simple particle system with the purpose to evaluate its performances on multi- A nd many-core computational devices. The system is modeled by means of the Discrete Element Method and the Extended Cellular Automata formalism, while OpenMP and OpenCL are used for parallelization. In particular, both the 3.1 and 4.5 OpenMP specifications have been considered, the latter also able to run on many-core computational devices like GPUs. The results of a first test simulation performed by considering a cubic domain with about 316,000 particles have shown a clear advantage of OpenCL on the considered Tesla K40 Nvidia GPU, while the OpenMP 3.1 implementation has performed better than the corresponding OpenMP 4.5 on the considered Intel Xeon E5-2650 16-thread CPU.

Structured Grid-Based Parallel Simulation of a Simple DEM Model on Heterogeneous Systems

De Rango, Alessio;NAPOLI, PIETRO;D'Ambrosio, Donato;Spataro, William;Di Renzo, Alberto;Di Maio, Francesco
2018-01-01

Abstract

Here we present different preliminary parallel grid-based implementations of a simple particle system with the purpose to evaluate its performances on multi- A nd many-core computational devices. The system is modeled by means of the Discrete Element Method and the Extended Cellular Automata formalism, while OpenMP and OpenCL are used for parallelization. In particular, both the 3.1 and 4.5 OpenMP specifications have been considered, the latter also able to run on many-core computational devices like GPUs. The results of a first test simulation performed by considering a cubic domain with about 316,000 particles have shown a clear advantage of OpenCL on the considered Tesla K40 Nvidia GPU, while the OpenMP 3.1 implementation has performed better than the corresponding OpenMP 4.5 on the considered Intel Xeon E5-2650 16-thread CPU.
2018
9781538649756
Cellular Automata; Discrete Element Method; Heterogeneous Computing; OpenCL; OpenMP; Computer Networks and Communications; Hardware and Architecture
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.11770/284752
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