Sfoglia per Rivista  IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

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Titolo Data di pubblicazione Autore(i) File
A high-speed energy-efficient 64-bit reconfigurable binary adder 1-gen-2003 Perri, Stefania; Corsonello, Pasquale; Cocorullo, Giuseppe
Approximate SRAMs with Dynamic Energy-Quality Management 1-gen-2016 Frustaci, F.; Blaauw, D.; Sylvester, D.; Alioto, M
Area-delay efficient binary adders in QCA 1-gen-2014 Perri, Stefania; Corsonello, Pasquale; Cocorullo, Giuseppe
Area-time-power tradeoff in cellular arrays VLSI implementations 1-gen-2000 Corsonello, Pasquale; Perri, Stefania; Cocorullo, G.
Area-time-power tradeoff in VLSI cellular arrays implementations 1-gen-2000 Corsonello, Pasquale; Perri, S.; Cocorullo, Giuseppe
Buried Silicon-Germanium pMOSFETs: Experimental Analysis in VLSI Logic Circuits Under Aggressive Voltage Scaling 1-gen-2012 Crupi, Felice; Alioto, M; Franco, J; Magnone, P; Kaczer, B; Groeseneken, G; Mitard, J; Witters, L; Hoffmann, Ty
Energy-Quality Scalable Adders Based on Nonzeroing Bit Truncation 1-gen-2019 Frustaci, Fabio; Perri, Stefania; Corsonello, Pasquale; Alioto, Massimo
Exploring the Usage of Fast Carry Chains to Implement Multistage Ring Oscillators on FPGAs: Design and Characterization 1-gen-2024 Spagnolo, Fanny; Perri, Stefania; Vatalaro, Massimo; Frustaci, Fabio; Crupi, Felice; Corsonello, Pasquale
Fast and Wide Range Voltage Conversion in Multi-Supply Voltage Designs 1-gen-2015 Lanuzza, Marco; Corsonello, Pasquale; Perri, Stefania
Gain-Cell Embedded DRAM Under Cryogenic Operation--A First Study 1-gen-2021 Garzon, E.; Greenblatt, Y.; Harel, O.; Lanuzza, M.; Teman, A.
Low Leakage SRAM Wordline Drivers for the 28nm UTBB FDSOI Technology 1-gen-2015 Corsonello, Pasquale; Frustaci, F; Perri, Stefania
A Sub-kT/q Voltage Reference Operating at 150 mV 1-gen-2015 Albano, D; Crupi, Felice; Cucchi, F; Iannaccone, G.
Techniques for leakage energy reduction in deep submicrometer cache memories 1-gen-2006 Frustaci, F; Corsonello, Pasquale; Perri, Stefania; Cocorullo, Giuseppe
Understanding the Potential and the Limits of Germanium pMOSFETs for VLSI Circuits From Experimental Measurements 1-gen-2011 Magnone, P; Crupi, Felice; Alioto, M; Kaczer, B; De Jaeger, B.
Variable precision arithmetic circuits for FPGA-based multimedia processors 1-gen-2004 Perri, Stefania; Corsonello, Pasquale; Iachino, Ma; Lanuzza, Marco; Cocorullo, Giuseppe
VLSI circuits for low-power high-speed asynchronous addition 1-gen-2002 Perri, Stefania; Corsonello, Pasquale; Cocorullo, Giuseppe
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