Today, there is an increasing interest in the design of complex asynchronous systems, such as Digital Signal Processors and microprocessors. For this reason, efficient self-timed modules for arithmetic operators are required. In this paper, new asynchronous circuits for division and square root are proposed. They have been realised using MOSIS 0.5μm CMOS technology. SPICE simulations show that the proposed circuits allow average throughput rates up to 200MOPS to be achieved, thus they are particularly suitable for high speed special purpose asynchronous datapaths.

High speed division and square root modules for asynchronous datapaths

G. COCORULLO;CORSONELLO, Pasquale;PERRI, Stefania
2000-01-01

Abstract

Today, there is an increasing interest in the design of complex asynchronous systems, such as Digital Signal Processors and microprocessors. For this reason, efficient self-timed modules for arithmetic operators are required. In this paper, new asynchronous circuits for division and square root are proposed. They have been realised using MOSIS 0.5μm CMOS technology. SPICE simulations show that the proposed circuits allow average throughput rates up to 200MOPS to be achieved, thus they are particularly suitable for high speed special purpose asynchronous datapaths.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.11770/138375
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