A new efficient VLSI implementation of a statistical carry lookahead adder is presented. The new circuit does not require precharged input signals, and it can be: used in practical asynchronous system design and in mixed logic design without any auxiliary circuitry. The circuit is realised in domino logic, and DCVSL gates are used for the critical path.
Efficient VLSI implementation of statistical carry lookahead adder
CORSONELLO, Pasquale;PERRI, Stefania;COCORULLO, Giuseppe
1998-01-01
Abstract
A new efficient VLSI implementation of a statistical carry lookahead adder is presented. The new circuit does not require precharged input signals, and it can be: used in practical asynchronous system design and in mixed logic design without any auxiliary circuitry. The circuit is realised in domino logic, and DCVSL gates are used for the critical path.File in questo prodotto:
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