The nested Miller frequency compensation (NMC) for multistage amplifiers is a well-known technique used to overcome the phase margin degradation due the low-frequency poles introduced by cascading stages. The NMC exploits both the Miller capacitance-multiplier effect and the pole-splitting action. In literature NMC capacitor sizing rules have been presented to design amplifiers characterised by a third-order Butterworth unity-gain closed-loop response. In the paper, the Authors show these criteria neglecting transistor parasitic capacitances, may lead to incorrect amplifier behaviour when small load capacitances have to be driven. A developed model, allowing better pole location estimation, is also presented.
Correct Modelling of Nested Miller Compensated Amplifier for Discrete-Time Applications
CAPPUCCINO, Gregorio;COCORULLO, Giuseppe
2006-01-01
Abstract
The nested Miller frequency compensation (NMC) for multistage amplifiers is a well-known technique used to overcome the phase margin degradation due the low-frequency poles introduced by cascading stages. The NMC exploits both the Miller capacitance-multiplier effect and the pole-splitting action. In literature NMC capacitor sizing rules have been presented to design amplifiers characterised by a third-order Butterworth unity-gain closed-loop response. In the paper, the Authors show these criteria neglecting transistor parasitic capacitances, may lead to incorrect amplifier behaviour when small load capacitances have to be driven. A developed model, allowing better pole location estimation, is also presented.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
