CAPPUCCINO, Gregorio

CAPPUCCINO, Gregorio  

Dipartimento di Ingegneria Informatica, Modellistica, Elettronica e Sistemistica  

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Risultati 1 - 20 di 85 (tempo di esecuzione: 0.037 secondi).
Titolo Data di pubblicazione Autore(i) File
A new efficient SC integrator scheme for high-speed low power applications 1-gen-2012 AMOROSO F., A; Pugliese, A; Cappuccino, Gregorio
A Simple MOSFET Parasitic Capacitance Model and Its Application to Repeater Insertion Technique 1-gen-2006 Pugliese, A; Cappuccino, Gregorio; Cocorullo, G.
A Time-domain Model for Power Dissipation of CMOS Buffers Driving Lossy Transmission Lines 1-gen-1999 Cappuccino, Gregorio; Cocorullo, G.
Adaptive Charging of Lead Acid batteries for Maximum Efficiency and Cycle Lifetime 1-gen-2020 Cappuccino, G.; Amoroso, F. A.
Advanced Lead-Acid battery management for low-TCO stationary storage systems 1-gen-2020 Cappuccino, G.; Amoroso, f. a.
Advantages of efficiency-aware smart charging strategies for PEVs 1-gen-2012 Amoroso, F. A.; Cappuccino, Gregorio
Analysis of op-amp phase margin impact on SC Sigma Delta modulator performance 1-gen-2010 Pugliese, A; Amoroso, Fa; Cappuccino, Gregorio; Cocorullo, Giuseppe
Analysis of the Impact of High-Order Integrator Dynamics on SC Sigma-Delta Modulator Performances 1-gen-2010 A., Pugliese; F. A., Amoroso; Cappuccino, Gregorio; Cocorullo, Giuseppe
Buffer output capacitance effect on NoC line drivers performance 1-gen-2006 Cappuccino, Gregorio; Pugliese, A; Cocorullo, G.
Channel Widening Effect on the Effective Output Resistance of Deep-Submicron CMOS Line Driver and its Application to Repeater Insertion 1-gen-2005 A., Pugliese; F., Corapi; Cappuccino, Gregorio
Circuito di retroazione a capacità commutate per amplificatori operazionali e metodo per pilotare la rete di retroazione 1-gen-2009 Cappuccino, Gregorio; Amoroso, F; Pugliese, A.
Class-AB Output Stage Design for High-Speed Three-Stage Op-Amps 1-gen-2009 Cappuccino, Gregorio; AMOROSO F., A; Pugliese, A.
CMOS buffer sizing for long on-chip interconnects 1-gen-1998 Cappuccino, Gregorio; Cocorullo, Giuseppe; Corsonello, Pasquale
CMOS Sizing Rule for High Performance Long Interconnects 1-gen-2001 Cappuccino, Gregorio; Cocorullo, G.
Correct Modelling of Nested Miller Compensated Amplifier for Discrete-Time Applications 1-gen-2006 Pugliese, A; Cappuccino, Gregorio; Cocorullo, Giuseppe
Corrections to Settling Time Optimization for Three-Stage CMOS Amplifier Topologies (vol 56, pg 2569, 2009) 1-gen-2010 Pugliese, A; AMOROSO F., A; Cappuccino, Gregorio; Cocorullo, G.
Custom Computing Reconfigurable Machine for High Performance Cellular Automata Processing 1-gen-2001 Cappuccino, G.; Cocorullo, G.; Corsonello, Pasquale; Perri, Stefania; Staino, G.
Design and demonstration of a real time processor for one-bit coded SAR signals 1-gen-1996 Cappuccino, Gregorio; Cocorullo, Giuseppe; Corsonello, Pasquale; Schirinzi, G.
Design and demonstration of high throughput square rooting circuit 1-gen-1996 Cappuccino, Gregorio; Corsonello, Pasquale; Cocorullo, Giuseppe
Design approach for fast-settling two-stage amplifiers employing current-buffer Miller compensation 1-gen-2009 Pugliese, A; Amoroso, Fa; Cappuccino, Gregorio; Cocorullo, Giuseppe