Settling time is one of the most important performance parameters for a whole class of amplifier, such as those employed in switched-capacitor-based circuits and analog-to-digital converters. In this work, analysis to predict and to minimize the settling time for amplifiers characterized by first-, second-, and third-order system-wise behaviour, is developed. The proposed method is very useful for design purposes. It allows amplifier poles to be placed directly in the complex plane, achieving the best-settled time response in accord with the desired accuracy level.

Settling Time Minimization of Operational Amplifiers

CAPPUCCINO, Gregorio;COCORULLO, Giuseppe
2007-01-01

Abstract

Settling time is one of the most important performance parameters for a whole class of amplifier, such as those employed in switched-capacitor-based circuits and analog-to-digital converters. In this work, analysis to predict and to minimize the settling time for amplifiers characterized by first-, second-, and third-order system-wise behaviour, is developed. The proposed method is very useful for design purposes. It allows amplifier poles to be placed directly in the complex plane, achieving the best-settled time response in accord with the desired accuracy level.
2007
978-3-540-74441-2
Settling time; switched-capacitor; amplifier
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.11770/162473
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