This paper presents the design of a new wavelet-based encoder suitable for fast and low-power image and video compression. The proposed circuit is based on a modified version of the No List SPIHT algorithm. When realized using a XILINX Virtex XC2V1000 device, the new encoder requires only 3.4ms to perform lossless image compression on a 128×128 16-bit discrete wavelet transformed image. It uses 392 slices, -15KB of RAM memory and dissipates just 8.2mW/MHz.

An efficient wavelet image encoder for FPGA-based design

LANUZZA, Marco;PERRI, Stefania;CORSONELLO, Pasquale;COCORULLO G.
2005-01-01

Abstract

This paper presents the design of a new wavelet-based encoder suitable for fast and low-power image and video compression. The proposed circuit is based on a modified version of the No List SPIHT algorithm. When realized using a XILINX Virtex XC2V1000 device, the new encoder requires only 3.4ms to perform lossless image compression on a 128×128 16-bit discrete wavelet transformed image. It uses 392 slices, -15KB of RAM memory and dissipates just 8.2mW/MHz.
2005
0-7803-9333-3
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.11770/173500
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