This work demonstrates the successful integration of 0.85nm-EOT Si 0.45Ge 0.55-pFETs using a gate first approach. An in-depth analysis, ranging from capacitor-level up to circuit-level is carried out, with systematic benchmarking to a conventional Si-channel reference. Outperforming the state-of-the-art Si 0.55Ge 0.45-pFETs, an I ON of 630μA/μm at L G-POLY = 35nm with I OFF = 100nA/μm and V DD = -1V has been achieved without any epi-S/D boosters. Significant improvements at lower V DD have also been confirmed through complex circuit simulations and validated by experimental results.

High-mobility 0.85nm-EOT Si 0.45Ge 0.55-pFETs: Delivering high performance at scaled VDD

CRUPI, Felice;
2010-01-01

Abstract

This work demonstrates the successful integration of 0.85nm-EOT Si 0.45Ge 0.55-pFETs using a gate first approach. An in-depth analysis, ranging from capacitor-level up to circuit-level is carried out, with systematic benchmarking to a conventional Si-channel reference. Outperforming the state-of-the-art Si 0.55Ge 0.45-pFETs, an I ON of 630μA/μm at L G-POLY = 35nm with I OFF = 100nA/μm and V DD = -1V has been achieved without any epi-S/D boosters. Significant improvements at lower V DD have also been confirmed through complex circuit simulations and validated by experimental results.
2010
978-142447419-6
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.11770/182064
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