Drowsiness detection is a key feature in modern Advanced Driver Assistance Systems (ADAS). State-of-the-art approaches rely on machine learning techniques and neural networks to monitor unusual movements of the head and eyes activities. Unfortunately, due to their computationally intensive operations, integrating such algorithms in real-time and low-power operating scenarios, like auto-motive applications, is still quite challenging. This paper proposes an efficient hardware architecture for real-time drowsiness detection based on monitoring the driver's eye blinking behaviour through the PERcentage of eye CLOSure (PERCLOS) metric. Experimental results obtained on the Xilinx Zynq XC7Z020 FPGA SoC show that the proposed system is up to 33.3 times faster and 2.6 times less area consuming than state-of-the-art competitors.
Heterogeneous FPGA-based System for Real-Time Drowsiness Detection
Migali A.;Spagnolo F.;Corsonello P.
2022-01-01
Abstract
Drowsiness detection is a key feature in modern Advanced Driver Assistance Systems (ADAS). State-of-the-art approaches rely on machine learning techniques and neural networks to monitor unusual movements of the head and eyes activities. Unfortunately, due to their computationally intensive operations, integrating such algorithms in real-time and low-power operating scenarios, like auto-motive applications, is still quite challenging. This paper proposes an efficient hardware architecture for real-time drowsiness detection based on monitoring the driver's eye blinking behaviour through the PERcentage of eye CLOSure (PERCLOS) metric. Experimental results obtained on the Xilinx Zynq XC7Z020 FPGA SoC show that the proposed system is up to 33.3 times faster and 2.6 times less area consuming than state-of-the-art competitors.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
