SPAGNOLO, Fanny

SPAGNOLO, Fanny  

Dipartimento di Ingegneria Informatica, Modellistica, Elettronica e Sistemistica  

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Titolo Data di pubblicazione Autore(i) File
Accuracy Improved Low-Energy Multi-bit Approximate Adders in QCA 1-gen-2021 Perri, S.; Spagnolo, F.; Frustaci, F.; Corsonello, P.
Aggressive Approximation of the SoftMax Function for Power-Efficient Hardware Implementations 1-gen-2021 Spagnolo, Fanny; Perri, Stefania; Corsonello, Pasquale
Approximate Down-Sampling Strategy for Power-Constrained Intelligent Systems In corso di stampa Spagnolo, Fanny; Perri, Stefania; Corsonello, Pasquale
Connected Component Analysis for Traffic Sign Recognition Embedded Processing Systems 1-gen-2019 Spagnolo, Fanny; Perri, Stefania; Frustaci, Fabio; Corsonello, Pasquale
Design of a real-time face detection architecture for heterogeneous systems-on-chips 1-gen-2020 Spagnolo, F.; Perri, S.; Corsonello, P.
Design of Flexible Hardware Accelerators for Image Convolutions and Transposed Convolutions 1-gen-2021 Sestito, Cristian; Spagnolo, Fanny; Perri, Stefania
Design of Real-Time FPGA-based Embedded System for Stereo Vision 1-gen-2018 Perri, Stefania; Frustaci, Fabio; Spagnolo, Fanny; Corsonello, Pasquale
Designing Fast Convolutional Engines for Deep Learning Applications 1-gen-2019 Spagnolo, Fanny; Perri, Stefania; Frustaci, Fabio; Corsonello, Pasquale
Efficient approximate adders for fpga-based data-paths 1-gen-2020 Perri, S.; Spagnolo, F.; Frustaci, F.; Corsonello, P.
Efficient Architecture for Integral Image Computation on Heterogeneous FPGAs 1-gen-2019 Spagnolo, Fanny; Corsonello, P.; Perri, Stefania
An efficient connected component labeling architecture for embedded systems 1-gen-2018 Spagnolo, F.; Frustaci, F.; Perri, S.; Corsonello, P.
An efficient convolution engine based on the à-trous spatial pyramid pooling 1-gen-2020 Sestito, C.; Spagnolo, F.; Corsonello, P.; Perri, S.
Efficient deconvolution architecture for heterogeneous systems-on-chip 1-gen-2020 Perri, S.; Sestito, C.; Spagnolo, F.; Corsonello, P.
An efficient hardware-oriented single-pass approach for connected component analysis 1-gen-2019 Spagnolo, Fanny; Perri, Stefania; Corsonello, P.
Energy‐efficient architecture for CNNs inference on heterogeneous FPGA 1-gen-2020 Spagnolo, Fanny; Perri, Stefania; Frustaci, F.; Corsonello, P.
A High-Performance and Power-Efficient SIMD Convolution Engine for FPGAs 1-gen-2020 Spagnolo, F.; Frustaci, F.; Perri, S.; Corsonello, P.
Parallel architecture of power-of-two multipliers for FPGAS 1-gen-2020 Perri, S.; Spagnolo, F.; Frustaci, F.; Corsonello, P.
A parallel connected component labeling architecture for heterogeneous systems-on-chip 1-gen-2020 Perri, Stefania; Spagnolo, Fanny; Corsonello, P.
Reconfigurable Convolution Architecture for Heterogeneous Systems-on-Chip 1-gen-2020 Spagnolo, F.; Perri, S.; Frustaci, F.; Corsonello, P.
Robust and High-Performance Machine Vision System for Automatic Quality Inspection in Assembly Processes 1-gen-2022 Frustaci, F.; Spagnolo, F.; Perri, S.; Cocorullo, G.; Corsonello, P.