Fine-grained methods for on-chip sensing of physical parameters in Field Programmable Gate Array (FPGA) designs are nowadays really desired. Thermal monitoring techniques are often adopted to prevent performance degradation and reliability issues due to over-heating, but they can also be successfully used to identify malicious activities, thus protecting the system when out-of-specification working modes occur. These techniques are most often based on ring oscillators, whose frequency is influenced by the temperature. However, with the aggressive scaling of the process technology node and supply voltage, sensing temperature is increasingly difficult with conventional approaches. In this paper, we propose an easy-to-use technique to realize low-energy ring oscillator architectures that can be effectively used for thermal monitoring, without requiring tedious manual layout actions. When realized on a 28nm CMOS FPGA device, the proposed circuit achieves a sensitivity up to ≈ 36 kHz/°C consuming just 0.96 pJ/transition.
Carry-chain based Ring Oscillator Design for Temperature Sensing on FPGAs
Spagnolo F.;Corsonello P.
2024-01-01
Abstract
Fine-grained methods for on-chip sensing of physical parameters in Field Programmable Gate Array (FPGA) designs are nowadays really desired. Thermal monitoring techniques are often adopted to prevent performance degradation and reliability issues due to over-heating, but they can also be successfully used to identify malicious activities, thus protecting the system when out-of-specification working modes occur. These techniques are most often based on ring oscillators, whose frequency is influenced by the temperature. However, with the aggressive scaling of the process technology node and supply voltage, sensing temperature is increasingly difficult with conventional approaches. In this paper, we propose an easy-to-use technique to realize low-energy ring oscillator architectures that can be effectively used for thermal monitoring, without requiring tedious manual layout actions. When realized on a 28nm CMOS FPGA device, the proposed circuit achieves a sensitivity up to ≈ 36 kHz/°C consuming just 0.96 pJ/transition.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.


