STRANGIO, SEBASTIANO
STRANGIO, SEBASTIANO
Dipartimento di Ingegneria Informatica, Modellistica, Elettronica e Sistemistica
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A virtual III-V tunnel FET technology platform for ultra-low voltage comparators and level shifters
2017-01-01 Settino, Francesco; Lanuzza, Marco; Strangio, Sebastiano; Crupi, Felice; Palestri, Pierpaolo; Esseni, David
An Ultralow-Voltage Energy-Efficient Level Shifter
2017-01-01 Lanuzza, Marco; Crupi, Felice; Rao, S; DE ROSE, Raffaele; Strangio, S; Iannaccone, G.
Benchmarks of a III-V TFET technology platform against the 10-nm CMOS FinFET technology node considering basic arithmentic circuits
2017-01-01 Strangio, S; Palestri, P; Lanuzza, M; Esseni, D; Crupi, Felice; Selmi, L.
Simulations and comparisons of basic analog and digital circuit blocks employing Tunnel FETs and conventional FinFETs
2017-01-01 Settino, Francesco; Strangio, Sebastiano; Lanuzza, Marco; Crupi, Felice; Palestri, Pierpaolo; Esseni, David
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| A virtual III-V tunnel FET technology platform for ultra-low voltage comparators and level shifters | 1-gen-2017 | Settino, Francesco; Lanuzza, Marco; Strangio, Sebastiano; Crupi, Felice; Palestri, Pierpaolo; Esseni, David | |
| An Ultralow-Voltage Energy-Efficient Level Shifter | 1-gen-2017 | Lanuzza, Marco; Crupi, Felice; Rao, S; DE ROSE, Raffaele; Strangio, S; Iannaccone, G. | |
| Benchmarks of a III-V TFET technology platform against the 10-nm CMOS FinFET technology node considering basic arithmentic circuits | 1-gen-2017 | Strangio, S; Palestri, P; Lanuzza, M; Esseni, D; Crupi, Felice; Selmi, L. | |
| Simulations and comparisons of basic analog and digital circuit blocks employing Tunnel FETs and conventional FinFETs | 1-gen-2017 | Settino, Francesco; Strangio, Sebastiano; Lanuzza, Marco; Crupi, Felice; Palestri, Pierpaolo; Esseni, David |