In this paper, a III-V nanowire TFET technology platform is compared against the predictive technology models of FinFETs at 10 nm node by evaluating the performance of two different comparator topologies. Furthermore, the potential of a hybrid FinFET/TFET approach in multi supply voltage design is addressed by considering level shifter circuits. Both analyses confirm that III-V TFET represents a promising technology option for future integrated circuits with sub-0.4 V operation.

A virtual III-V tunnel FET technology platform for ultra-low voltage comparators and level shifters

Settino, Francesco;Lanuzza, Marco;Strangio, Sebastiano;Crupi, Felice;
2017-01-01

Abstract

In this paper, a III-V nanowire TFET technology platform is compared against the predictive technology models of FinFETs at 10 nm node by evaluating the performance of two different comparator topologies. Furthermore, the potential of a hybrid FinFET/TFET approach in multi supply voltage design is addressed by considering level shifter circuits. Both analyses confirm that III-V TFET represents a promising technology option for future integrated circuits with sub-0.4 V operation.
2017
9781509065073
comparator; hybrid design; level shifter; TFET; Electrical and Electronic Engineering; Instrumentation
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.11770/268376
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