In this brief, a new low-power level shifter ispresented for robust logic voltage shifting from near/subthresholdto above-threshold domain. The new circuit combinesthe multi-threshold CMOS technique along with noveltopological modifications to guarantee wide voltage conversionrange with limited static power and total energy consumption.When implemented in a 90 nm technology process, theproposed design reliably converts 180mV input signals into 1Voutput signals, while maintaining operational frequencies above1-MHz, also taking into account PVT variations.Post-layout simulation results demonstrate that the new levelshifter reaches a propagation delay less than 22 ns, a static powerdissipation of only 6.4 nW and a total energy per transition ofonly 74fJ for a 0.2V 1MHz input pulse.
Low-Power Level Shifter for Multi-Supply Voltage Designs
Lanuzza M.;Corsonello P.;Perri S.
2012-01-01
Abstract
In this brief, a new low-power level shifter ispresented for robust logic voltage shifting from near/subthresholdto above-threshold domain. The new circuit combinesthe multi-threshold CMOS technique along with noveltopological modifications to guarantee wide voltage conversionrange with limited static power and total energy consumption.When implemented in a 90 nm technology process, theproposed design reliably converts 180mV input signals into 1Voutput signals, while maintaining operational frequencies above1-MHz, also taking into account PVT variations.Post-layout simulation results demonstrate that the new levelshifter reaches a propagation delay less than 22 ns, a static powerdissipation of only 6.4 nW and a total energy per transition ofonly 74fJ for a 0.2V 1MHz input pulse.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.