A novel expression for the power dissipation of CMOS buffers driving a capacitive-ended transmission line is presented. In spite of the conventional power estimation formula the proposed expression allows both the actual signal rise time and load to be taken into account to provide an accuracy comparable with HSPICE, but avoiding a time-consuming numerical approach. (C) 1999 John Wiley & Sons, Inc.
Estimation of power dissipation for transmission lines in deep-submicrometer ULSI circuits
CAPPUCCINO, Gregorio;Cocorullo G;CORSONELLO, Pasquale
1999-01-01
Abstract
A novel expression for the power dissipation of CMOS buffers driving a capacitive-ended transmission line is presented. In spite of the conventional power estimation formula the proposed expression allows both the actual signal rise time and load to be taken into account to provide an accuracy comparable with HSPICE, but avoiding a time-consuming numerical approach. (C) 1999 John Wiley & Sons, Inc.File in questo prodotto:
Non ci sono file associati a questo prodotto.
I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
