A first study of the BTI reliability of a 6 Å EOT CMOS process for potential application in sub-threshold logic is presented. Considerable threshold voltage shifts are observed also for sub-threshold operation. The observed shifts convert to a remarkable current reduction due to the exponential dependence of cur- rent on Vth in this operating regime. Moreover, the pMOS is observed to degrade significantly more w.r.t. the nMOS device, inducing a detrimental Vth-imbalance. A proper device failure criterion is proposed, based on simulation of the DC robustness of an inverter logic circuit.
BTI Reliability of Ultra-Thin EOT MOSFETs for Sub-Threshold Logic / Franco, J; Graziano, S; Kaczer, B; Crupi, Felice; Ragnarsson L., Å; Grasser, T; Groeseneken, G.. - In: MICROELECTRONICS RELIABILITY. - ISSN 0026-2714. - 52(2012), pp. 1932-1935.
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Titolo: | BTI Reliability of Ultra-Thin EOT MOSFETs for Sub-Threshold Logic |
Autori: | |
Data di pubblicazione: | 2012 |
Rivista: | |
Citazione: | BTI Reliability of Ultra-Thin EOT MOSFETs for Sub-Threshold Logic / Franco, J; Graziano, S; Kaczer, B; Crupi, Felice; Ragnarsson L., Å; Grasser, T; Groeseneken, G.. - In: MICROELECTRONICS RELIABILITY. - ISSN 0026-2714. - 52(2012), pp. 1932-1935. |
Handle: | http://hdl.handle.net/20.500.11770/158804 |
Appare nelle tipologie: | 1.1 Articolo in rivista |