An Efficient and Low-Cost Design Methodology to Improve SRAM-based FPGA Robustness in Space and Avionics Applications

This paper presents an efficient approach to protect an FPGA designagainst Single Event Upsets (SEUs). A novel configuration scrubbing core, instantiatedat the top level of the user project, is used for internal detection andcorrection of SEU-induced configuration errors without requiring further externalradiation hardened control hardware. As demonstrated in the paper, this approachcombines the benefits of fast SEU faults detection with fast restorationof the device functionality and small overhead. Moreover, the proposed techniqueresult highly versatile and can be adopted for different FPGA devicefamilies