FRUSTACI, Fabio
FRUSTACI, Fabio
Dipartimento di Ingegneria Informatica, Modellistica, Elettronica e Sistemistica
A 32kb SRAM for error-free and error-tolerant applications with dynamic energy-quality management in 28nm CMOS
2014-01-01 Frustaci, F.; Khayatzadeh, M.; Blaauw, D.; Sylvester, D.; Alioto, M.
A High-Performance and Power-Efficient SIMD Convolution Engine for FPGAs
2020-01-01 Spagnolo, F.; Frustaci, F.; Perri, S.; Corsonello, P.
A High-Speed and Low-Power DSP-Based TRNG for FPGA Implementations
2024-01-01 Frustaci, F.; Spagnolo, F.; Corsonello, P.; Perri, S.
A High-Speed FPGA-based True Random Number Generator using Metastability with Clock Managers
2023-01-01 Frustaci, Fabio; Spagnolo, Fanny; Perri, Stefania; Corsonello, Pasquale
A layout strategy for low-power voltage level shifters in 28nm UTBB FDSOI technology
2015-01-01 Corsonello, Pasquale; Frustaci, F; Perri, Stefania
A low-leakage single ended 6T SRAM cell
2010-01-01 Solanki, S.; Frustaci, F.; Corsonello, Pasquale
A new dynamic logic circuit design for an effective trade-off between noise-immunity, performance and energy dissipation
2009-01-01 Frustaci, F; Corsonello, Pasquale; Perri, S; Cocorullo, Giuseppe
A New Dynamic Logic Circuit Design for an Effective Trade-off between Noise-Immunity, Performance and Energy Dissipation
2009-01-01 Frustaci, F.; Corsonello, Pasquale; Perri, Stefania; Cocorullo, G.
A new low-power high-speed single-clock-cycle binary comparator
2010-01-01 Frustaci, F.; Perri, Stefania; Lanuzza, Marco; Corsonello, Pasquale
A new noise-tolerant dynamic logic circuit design
2007-01-01 Frustaci, F; Corsonello, Pasquale; Cocorullo, Giuseppe
A New optimized high-speed low-power Data-Driven Dynamic (D3L) 32-bit Kogge-Stone adder
2010-01-01 Frustaci, F; Lanuzza, Marco
A new scheme to reduce leakage in deep-submicron cache memories with no extra dynamic consumption
2006-01-01 Frustaci, F; Corsonello, Pasquale; Perri, Stefania; Cocorullo, Giuseppe
A novel background subtraction method based on color invariants and grayscale levels
2014-01-01 Guachi, L; Cocorullo, Giuseppe; Corsonello, Pasquale; Frustaci, F; Perri, Stefania
A reconfigurable sense amplifier with 3X offset reduction in 28nm FDSOI CMOS
2015-01-01 Khayatzadeh, M.; Frustaci, F.; Blaauw, D.; Sylvester, D.; Alioto, M.
A Self-Hosting Configuration Management System to Mitigate the Impact of Radiation-Induced Multi-Bit Upsets in SRAM-Based FPGAs
2010-01-01 Lanuzza, Marco; Zicari, P; Perri, Stefania; Frustaci, F; Corsonello, Pasquale
Accuracy Improved Low-Energy Multi-bit Approximate Adders in QCA
2021-01-01 Perri, S.; Spagnolo, F.; Frustaci, F.; Corsonello, P.
Accurate power estimation model for CMOS adders optimization
2004-01-01 Perri, Stefania; Frustaci, F; Corsonello, Pasquale
An Efficient and Low-Cost Design Methodology to Improve SRAM-based FPGA Robustness in Space and Avionics Applications
2009-01-01 Lanuzza, Marco; Zicari, P; Frustaci, F; Perri, Stefania; Corsonello, Pasquale
An efficient connected component labeling architecture for embedded systems
2018-01-01 Spagnolo, F.; Frustaci, F.; Perri, S.; Corsonello, P.
An Efficient Hardware-Oriented Stereo Matching Algorithm
2016-01-01 Cocorullo, G; Corsonello, Pasquale; Frustaci, F; Perri, Stefania