This paper presents a novel Connected Component Analysis hardware architecture suitable for high-performance heterogeneous image processing embedded systems. The target application referenced along the work is the Automated Traffic Sign Recognition for next generation Advanced Driver-Assistance Systems. In such a field, a high throughput rate is mandatory to obey high-speed camera input frame rate. The proposed architecture executes a complete Connected Component Analysis by just one scan of the input image; therefore, it reaches performances higher than several existing hardware designs. When implemented on a Xilinx Zynq Z7045 SoC, our design allows a throughput rate of 212 Mpixels/s to be reached using 18144 LUTs and 5005 FFs, which correspond to less than 9% and 1.5% of the available resources.

Connected Component Analysis for Traffic Sign Recognition Embedded Processing Systems

Spagnolo, Fanny;Perri, Stefania;Frustaci, Fabio;Corsonello, Pasquale
2019

Abstract

This paper presents a novel Connected Component Analysis hardware architecture suitable for high-performance heterogeneous image processing embedded systems. The target application referenced along the work is the Automated Traffic Sign Recognition for next generation Advanced Driver-Assistance Systems. In such a field, a high throughput rate is mandatory to obey high-speed camera input frame rate. The proposed architecture executes a complete Connected Component Analysis by just one scan of the input image; therefore, it reaches performances higher than several existing hardware designs. When implemented on a Xilinx Zynq Z7045 SoC, our design allows a throughput rate of 212 Mpixels/s to be reached using 18144 LUTs and 5005 FFs, which correspond to less than 9% and 1.5% of the available resources.
9781538695623
Connected Component Analysis; Embedded Systems; FPGA; SoC; Electrical and Electronic Engineering; Instrumentation
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.11770/290093
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