In approximate operators, dynamic truncation allows trading off energy and quality of computation at runtime. Although it exploits the specificity of the data being processed, its significant energy overhead over simple static truncation fundamentally limits its energy benefits. This brief describes a simple and efficient design methodology that reduces the energy consumption of dynamically truncated multipliers, based on a smart mapping of the partial products. A configurable hardware correction strategy is also proposed to enable graceful quality degradation, as well as more aggressive energy reduction at a given quality. When applied to Wallace multipliers, the proposed approach achieves quality, in terms of Mean Error Distance, up to $11 imes $ higher than the conventional dynamic truncation, at the same energy. In the case study of Discrete Cosine Transform compression, the proposed approximate multiplier reaches image qualities by 15-35% better, compared to prior art.

Approximate Multipliers with Dynamic Truncation for Energy Reduction via Graceful Quality Degradation

Frustaci F.;Perri S.;Corsonello P.;
2020-01-01

Abstract

In approximate operators, dynamic truncation allows trading off energy and quality of computation at runtime. Although it exploits the specificity of the data being processed, its significant energy overhead over simple static truncation fundamentally limits its energy benefits. This brief describes a simple and efficient design methodology that reduces the energy consumption of dynamically truncated multipliers, based on a smart mapping of the partial products. A configurable hardware correction strategy is also proposed to enable graceful quality degradation, as well as more aggressive energy reduction at a given quality. When applied to Wallace multipliers, the proposed approach achieves quality, in terms of Mean Error Distance, up to $11 imes $ higher than the conventional dynamic truncation, at the same energy. In the case study of Discrete Cosine Transform compression, the proposed approximate multiplier reaches image qualities by 15-35% better, compared to prior art.
2020
approximate computing
Energy-quality scaling
low-power design
multiplier
VLSI
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.11770/314992
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