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GARZON CORDOVA, ESTEBAN JOSE

GARZON CORDOVA, ESTEBAN JOSE  

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Titolo Data di pubblicazione Autore(i) File
A 0.05 mm², 350 mV, 14 nW Fully-Integrated Temperature Sensor in 180-nm CMOS 1-gen-2022 Zambrano, Benjamin; Garzon, Esteban; Strangio, S.; Crupi, F.; Lanuzza, M.
A 0.6V–1.8V Compact Temperature Sensor with 0.24 °C Resolution, ±1.4 °C Inaccuracy and 1.06 nJ per Conversion 1-gen-2022 Zambrano, Benjamin.; Garzon, Esteban; Strangio, S.; Iannaccone, G.; Lanuzza, M.
A Low-Complexity Sensing Scheme for Approximate Matching Content-Addressable Memory 1-gen-2023 Garzon, E.; Golman, R.; Lanuzza, M.; Teman, A.; Yavits, L.
A Low-Energy DMTJ-Based Ternary Content- Addressable Memory With Reliable Sub-Nanosecond Search Operation 1-gen-2023 Garzon, E.; Yavits, L.; Finocchio, G.; Carpentieri, M.; Teman, A.; Lanuzza, M.
A RISC-V-based Research Platform for Rapid Design Cycle 1-gen-2022 Garzon, Esteban; Golman, Roman; Harel, Odem; Noy, Tzachia; Kra, Yehuda; Pollock, Asaf; Yuzhaninov, Slava; Shoshan, Yonatan; Rudin, Yehuda; Weitzman, Yoav; Lanuzza, Marco; Teman, Adam
Adjusting thermal stability in double-barrier MTJ for energy improvement in cryogenic STT-MRAMs 1-gen-2022 Esteban, Garzon; De Rose, R.; Crupi, F.; Trojman, L.; Teman, A.; Lanuzza, M.
AIDA: Associative In-memory Deep learning Accelerator 1-gen-2022 Esteban, Garzon; Teman, A.; Lanuzza, M.; Yavits, L.
All-Analog Silicon Integration of Image Sensor and Neural Computing Engine for Image Classification 1-gen-2022 Benjamin, Zambrano; Strangio, S.; Rizzo, T.; Esteban, Garzon; Lanuzza, M.; Iannaccone, G.
AM4: MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing 1-gen-2023 Garzon, E.; Lanuzza, M.; Teman, A.; Yavits, L.
Approximate Content-Addressable Memories: A Review 1-gen-2023 Garzón, Esteban; Yavits, Leonid; Teman, Adam; Lanuzza, Marco
Assessment of STT-MRAM performance at nanoscaled technology nodes using a device-to-memory simulation framework 1-gen-2019 Garzon, E.; De Rose, R.; Crupi, F.; Trojman, L.; Lanuzza, M.
Assessment of STT-MRAMs based on double-barrier MTJs for cache applications by means of a device-to-system level simulation framework 1-gen-2020 Garzon, E.; De Rose, R.; Crupi, F.; Trojman, L.; Finocchio, G.; Carpentieri, M.; Lanuzza, M.
Capacitance Extraction of 34-nm Metallurgical Channel Length MOSFET for Parasitic Assessment Using the RFCV Technique 1-gen-2018 Benalcazar, D. R.; Garzon, Esteban; Trojman, L.
Device-to-system level simulation framework for STT-DMTJ based cache memory 1-gen-2019 Garzon, E.; De Rose, R.; Crupi, F.; Lanuzza, M.
DIPER: Detection and Identification of Pathogens using Edit distance-tolerant Resistive CAM 1-gen-2023 Merlin, Itay; Garzón, Esteban; Fish, Alex; Yavits, Leonid
EDAM: Edit Distance tolerant Approximate Matching content addressable memory 1-gen-2022 Hanhan, R.; Garzon, Esteban; Jahshan, Z.; Teman, A.; Lanuzza, M.; Yavits, L.
Efficiency of Double-Barrier Magnetic Tunnel Junction-Based Digital eNVM Array for Neuro-Inspired Computing 1-gen-2023 Moposita, T.; Garzon, E.; Crupi, F.; Trojman, L.; Vladimirescu, A.; Lanuzza, M.
Efficient Implementation of Many-Ported Memories by Using Standard-Cell Memory Approach 1-gen-2023 Marinberg, H.; Garzon, E.; Noy, T.; Lanuzza, M.; Teman, A.
Embedded memories for cryogenic applications 1-gen-2022 Garzon, Esteban; Teman, A.; Lanuzza, M.
Emerging Memory Structures for VLSI Circuits 1-gen-2022 Garzon, Esteban; Yavits, Leonid; Lanuzza, Marco; Teman, Adam