Design of a sub-1-V nanopower CMOS current reference

In this paper, we propose a sub-1-V nanopower current reference based on dual-threshold voltage current mirror stages, used to compensate the temperature dependence of the current of a diode-connected transistor operating in deep subthreshold region. The proposed solution has been designed in a 0.18 μm CMOS technology and analyzed through circuit simulations. Simulation results show an output current of about 16 nA and a power consumption below 20 nW at the minimum operating voltage of 0.6 V and at the room temperature. The line sensitivity is 5.4 %/V, while the temperature coefficient is 274 ppm/°C. When compared to other state-of-the-art nanopower solutions, the proposed scheme proves to be a competitive candidate thanks to the low minimum operating voltage and the small area occupation.