Sfoglia per Autore
Design Methodology of Nested Miller Amplifiers for Small Capacitive Loads
2007-01-01 Pugliese, A; Cappuccino, Gregorio; Cocorullo, G.
Design Procedure for Settling Time Minimization in Three-Stage Nested-Miller Amplifiers
2008-01-01 Pugliese, A; Cappuccino, Gregorio; Cocorullo, Giuseppe
Efficient switched-capacitor common-mode feedback circuit for high-speed low-power amplifiers
2008-01-01 Amoroso, F. A.; Pugliese, A; Cappuccino, Gregorio; Cocorullo, Giuseppe
Settling-time-oriented design procedure for two-stage amplifiers with current-buffer Miller compensation
2008-01-01 Pugliese, A; Amoroso, Fa; Cappuccino, Gregorio; Cocorullo, Giuseppe
Settling Time Optimisation for Two-Stage CMOS Amplifiers With Current-Buffer Miller Compensation - errata
2008-01-01 Pugliese, A; Amoroso, F. A.; Cappuccino, Gregorio; Cocorullo, G.
Effect of the integrator settling behavior on SC ΣΔ modulator characteristics: A theoretical study
2008-01-01 Pugliese, A; Amoroso, F. A.; Cappuccino, Gregorio; Cocorullo, G.
Slewing investigation and improved design rules for SC circuits employing two-stage amplifiers with current-buffer Miller compensation Istanbul, 2008, 2008, pp. -
2008-01-01 Amoroso, F. A.; Pugliese, A; Cappuccino, Gregorio; Cocorullo, G.
Simulation and timing performances of integrated waveguides for ultra-high speed interconnects
2008-01-01 Urbano, D; Arnieri, Emilio; Cappuccino, Gregorio; Amendola, Gian Domenico
Performance of current mirror with high-k gate dielectrics
2008-01-01 Crupi, Felice; Magnone, P; Pugliese, A; Cappuccino, Gregorio
Design approach for fast-settling two-stage amplifiers employing current-buffer Miller compensation
2009-01-01 Pugliese, A; Amoroso, Fa; Cappuccino, Gregorio; Cocorullo, Giuseppe
Circuito di retroazione a capacità commutate per amplificatori operazionali e metodo per pilotare la rete di retroazione
2009-01-01 Cappuccino, Gregorio; Amoroso, F; Pugliese, A.
sistema e metodo di energy harvesting da vibrazioni meccaniche e radiazioni elettromagnetiche
2009-01-01 Amoroso, F. A.; Cappuccino, Gregorio
Design Considerations for Fast-Settling Two-Stage Miller-Compensated Operational Amplifiers
2009-01-01 Amoroso, F. A.; Cappuccino, Gregorio; Pugliese, A.
SETTLING-TIME-ORIENTED DESIGN PROCEDURE FOR TWO-STAGE AMPLIFIERS WITH CURRENT-BUFFER MILLER COMPENSATION
2009-01-01 Pugliese, A; Amoroso, F. A.; Cappuccino, Gregorio; Cocorullo, Giuseppe
Effect of Op-Amp Phase Margin on SC Sigma-Delta Modulator Performances
2009-01-01 Pugliese, A; Amoroso, F. A.; Cappuccino, Gregorio; Cocorullo, G.
Class-AB Output Stage Design for High-Speed Three-Stage Op-Amps
2009-01-01 Cappuccino, Gregorio; Amoroso, F. A.; Pugliese, A.
Large-Signal Settling Optimization of SC Circuits Using Two-Stage Amplifiers with Current-Buffer Miller Compensation
2009-01-01 F. A., Amoroso; A., Pugliese; Cappuccino, Gregorio
Settling Time Optimization for Three-Stage CMOS Amplifier Topologies
2009-01-01 Pugliese, A; Amoroso, F. A.; Cappuccino, Gregorio; Cocorullo, G.
Settling-Optimization-Based Design Approach for Three-Stage Nested-Miller Amplifiers
2009-01-01 Pugliese, A; Amoroso, F. A; Cappuccino, Gregorio; Cocorullo, G.
Corrections to Settling Time Optimization for Three-Stage CMOS Amplifier Topologies (vol 56, pg 2569, 2009)
2010-01-01 Pugliese, A; Amoroso, F. A.; Cappuccino, Gregorio; Cocorullo, G.
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