This paper presents a comparative study on non-volatile cache memories based on nanoscaled spin-transfer torque (STT)-magnetic tunnel junctions (MTJs). In particular, the impact of using double-barrier MTJs (DMTJs) instead of conventional single-barrier MTJs (SMTJs) is evaluated through a device-to-system level simulation framework. Simulation results demonstrate that DMTJ-based STT-MRAMs are promising competitors for the next generation of non-volatile cache memories.

Device-to-system level simulation framework for STT-DMTJ based cache memory

Garzon E.;De Rose R.;Crupi F.;Lanuzza M.
2019

Abstract

This paper presents a comparative study on non-volatile cache memories based on nanoscaled spin-transfer torque (STT)-magnetic tunnel junctions (MTJs). In particular, the impact of using double-barrier MTJs (DMTJs) instead of conventional single-barrier MTJs (SMTJs) is evaluated through a device-to-system level simulation framework. Simulation results demonstrate that DMTJ-based STT-MRAMs are promising competitors for the next generation of non-volatile cache memories.
978-1-7281-0996-1
Device-to-system simulation framework; Double-barrier magnetic tunnel junction; STT-MRAM
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/20.500.11770/303197
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