This article introduces a compact NMOS-only voltage reference that is able to operate down to a 0.25-V supply voltage and 5.4-pW power consumption. This allows reliable generation of a stable output voltage even in harvested systems under highly uncertain environmental conditions. At the system level, pW-power, 0.25-1.8-V operation, and a competitive power supply rejection ratio (PSRR) relax or eliminate the need for intermediate power conversion and supply regulation for additional power and cost reductions. The proposed voltage reference is based on a body biasing scheme assisted by replica well biasing to compensate voltage and temperature fluctuations. A 180-nm test chip shows that the proposed reference occupies an area of 2200 μm², while providing 91.4-mV output voltage with 0.51-mV (0.56%) standard deviation, 24.2 μV/°C (265 ppm/°C) temperature coefficient, and 144.5 μV/V (0.16%/V) line sensitivity across 30 dice from the same manufacturing lot. The resulting absolute output voltage accuracy without any trimming is 2.8 mV at 3-σ variations, 0.3-V fluctuation, and temperature change by 50 °C, improving on prior art by 1.4-19.7x. Overall, the capability of reliable operating down to ultralow voltages, pW-power, and the inherently small footprint make the proposed reference well suited for low-cost tightly constrained systems.

Trimming-Less Voltage Reference for Highly Uncertain Harvesting Down to 0.25 V, 5.4 pW

Fassio L.;De Rose R.;Lanuzza M.;Crupi F.;
2021-01-01

Abstract

This article introduces a compact NMOS-only voltage reference that is able to operate down to a 0.25-V supply voltage and 5.4-pW power consumption. This allows reliable generation of a stable output voltage even in harvested systems under highly uncertain environmental conditions. At the system level, pW-power, 0.25-1.8-V operation, and a competitive power supply rejection ratio (PSRR) relax or eliminate the need for intermediate power conversion and supply regulation for additional power and cost reductions. The proposed voltage reference is based on a body biasing scheme assisted by replica well biasing to compensate voltage and temperature fluctuations. A 180-nm test chip shows that the proposed reference occupies an area of 2200 μm², while providing 91.4-mV output voltage with 0.51-mV (0.56%) standard deviation, 24.2 μV/°C (265 ppm/°C) temperature coefficient, and 144.5 μV/V (0.16%/V) line sensitivity across 30 dice from the same manufacturing lot. The resulting absolute output voltage accuracy without any trimming is 2.8 mV at 3-σ variations, 0.3-V fluctuation, and temperature change by 50 °C, improving on prior art by 1.4-19.7x. Overall, the capability of reliable operating down to ultralow voltages, pW-power, and the inherently small footprint make the proposed reference well suited for low-cost tightly constrained systems.
2021
Art
Batteryless systems
body biasing
energy harvesting
Internet of Things
Logic gates
Power demand
Subthreshold current
Temperature dependence
Temperature sensors
Transistors
ultralow voltage
voltage reference.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.11770/323185
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