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Space-Time diversity for NLOS mitigation in TDOA-based positioning systems 1-gen-2016 Rene Jativa, E.; Garzon, Esteban; Vidal, J.
Remote control of VNA and parameter analyzer for RFCV measurements using Python 1-gen-2016 Garzon, Esteban.; Sanchez, F.; Procel, L. -M.; Trojman, L.
Fast computation of Cramer-Rao Bounds for TOA: An application to network-based positioning simulations 1-gen-2017 Garzon, Esteban; Valdiviezo, S.; Jativa, R.; Vidal, J.
Capacitance Extraction of 34-nm Metallurgical Channel Length MOSFET for Parasitic Assessment Using the RFCV Technique 1-gen-2018 Benalcazar, D. R.; Garzon, Esteban; Trojman, L.
Assessment of STT-MRAM performance at nanoscaled technology nodes using a device-to-memory simulation framework 1-gen-2019 Garzon, E.; De Rose, R.; Crupi, F.; Trojman, L.; Lanuzza, M.
Microprocessor Design with a Direct Bluetooth Connection in 45 nm Technology Using Microwind 1-gen-2019 Garzon, Esteban; Chavez, F.; Jaramillo, D.; Sanchez, L.; Lara, S.; Macias, C.; Acurio, E.; Procel, L. -M.; Trojman, L.; Sicard, E.
Device-to-system level simulation framework for STT-DMTJ based cache memory 1-gen-2019 Garzon, E.; De Rose, R.; Crupi, F.; Lanuzza, M.
Evaluating the energy efficiency of stt-mrams based on perpendicular mtjs with double reference layers 1-gen-2019 Lanuzza, M.; Rose, R. D.; Garzon, E.; Crupi, F.
Exploiting Double-Barrier MTJs for Energy-Efficient Nanoscaled STT-MRAMs 1-gen-2019 Garzon, E.; De Rose, R.; Crupi, F.; Trojman, L.; Finocchio, G.; Carpentieri, M.; Lanuzza, M.
Reconfigurable CMOS/STT-MTJ Non-Volatile Circuit for Logic-in-Memory Applications 1-gen-2020 Garzon, Esteban; Zambrano, B.; Moposita, T.; Taco, R.; Procel, L. -M.; Trojman, L.
Assessment of STT-MRAMs based on double-barrier MTJs for cache applications by means of a device-to-system level simulation framework 1-gen-2020 Garzon, E.; De Rose, R.; Crupi, F.; Trojman, L.; Finocchio, G.; Carpentieri, M.; Lanuzza, M.
Field-Free Magnetic Tunnel Junction for Logic Operations Based on Voltage-Controlled Magnetic Anisotropy 1-gen-2021 Cutugno, F.; Garzon, Esteban; De Rose, R.; Finocchio, G.; Lanuzza, M.; Carpentieri, M.
Relaxing non-volatility for energy-efficient DMTJ based cryogenic STT-MRAM 1-gen-2021 Garzon, E.; De Rose, R.; Crupi, F.; Trojman, L.; Teman, A.; Lanuzza, M.
Energy efficient self-adaptive dual mode logic address decoder 1-gen-2021 Vicuna, K.; Mosquera, C.; Musello, A.; Benedictis, S.; Rendon, M.; Garzon, Esteban; Procel, L. M.; Trojman, L.; Taco, R.
Gain-Cell Embedded DRAM Under Cryogenic Operation--A First Study 1-gen-2021 Garzon, E.; Greenblatt, Y.; Harel, O.; Lanuzza, M.; Teman, A.
Simulation Analysis of DMTJ-Based STT-MRAM Operating at Cryogenic Temperatures 1-gen-2021 Garzon, E.; De Rose, R.; Crupi, F.; Carpentieri, M.; Teman, A.; Lanuzza, M.
Exploiting STT-MRAMs for Cryogenic Non-Volatile Cache Applications 1-gen-2021 Garzon, E.; De Rose, R.; Crupi, F.; Teman, A.; Lanuzza, M.
Ultralow voltage finFET-versus TFET-based STT-MRAM cells for iot applications 1-gen-2021 Garzon, E.; Lanuzza, M.; Taco, R.; Strangio, S.
Quantum capacitance transient phenomena in high-k dielectric armchair graphene nanoribbon field-effect transistor model 1-gen-2021 Avnon, A.; Golman, R.; Garzon, E.; Ngo, H. -D.; Lanuzza, M.; Teman, A.
Emerging Memory Structures for VLSI Circuits 1-gen-2022 Garzon, Esteban; Yavits, Leonid; Lanuzza, Marco; Teman, Adam
Mostrati risultati da 1 a 20 di 45
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