Sfoglia per Autore
High performance square rooting circuit using hybrid radix-2 adders
1999-01-01 Corsonello, Pasquale; Perri, Stefania
A New High Performance Circuit for Statistical Carry Lookahead Addition
1999-01-01 Corsonello, Pasquale; Perri, S.; Cocorullo, Giuseppe
An Hybrid Carry Select Statistical Carry Look-Ahead Adder
1999-01-01 Corsonello, Pasquale; Perri, S; Cocorullo, Giuseppe
Educational design of high-performance arithmetic circuits on FPGA
1999-01-01 Cappuccino, Gregorio; Cocorullo, Giuseppe; Corsonello, Pasquale; Perri, S.
Educational Design of high performance arithmetic circuits
1999-01-01 Cappuccino, G; Cocorullo, G; Corsonello, Pasquale; Perri, Stefania
High speed self-timed pipelined datapath for square rooting
1999-01-01 Cappuccino, Gregorio; Cocurullo, G; Corsonello, Pasquale; Perri, Stefania
A new type of fast, low-cost binary adder
2000-01-01 Corsonello, Pasquale; V., Kantabutra; Perri, Stefania
Fast, low-cost adders using carry-strength
2000-01-01 V., Kantabutra; Corsonello, Pasquale; Perri, Stefania
Fast, low-cost adders using carry-strength signals
2000-01-01 Kantabutra, V.; Corsonello, Pasquale; Perri, S.
Low-cost redundant cell adders using carry-strength signals
2000-01-01 Corsonello, Pasquale; Kantabutra, V.; Perri, S.
High speed division and square root modules for asynchronous datapaths
2000-01-01 Cocorullo, Giuseppe; Corsonello, Pasquale; Perri, S; Cappuccino, Gregorio
High speed division and square root modules for asynchronous datapath
2000-01-01 Cappuccino, G; Corsonello, Pasquale; Cocorullo, G; Perri, S.
VLSI implementation of low-power high-speed self-timed adder
2000-01-01 Corsonello, Pasquale; Perri, S.; Cocorullo, G.
VLSI implementation of a low-power high-speed self-timed adder
2000-01-01 Corsonello, Pasquale; Perri, Stefania; Cocorullo, G.
High speed division and square root modules for asynchronous datapaths
2000-01-01 Cappuccino, G; Cocorullo, G.; Corsonello, Pasquale; Perri, Stefania
Design of 3 : 1 multiplexer standard cell
2000-01-01 Corsonello, Pasquale; Perri, Stefania; Kantabutra, V.
Area-time-power tradeoff in VLSI cellular arrays implementations
2000-01-01 Corsonello, Pasquale; Perri, S.; Cocorullo, Giuseppe
VLSI implementation of low-power high-speed self-timed adder
2000-01-01 Cocorullo, Giuseppe; Perri, S; Corsonello, Pasquale
Designing high-speed asynchronous pipelines
2000-01-01 Perri, Stefania; Corsonello, Pasquale; Cocorullo, Giuseppe
Area-time-power tradeoff in cellular arrays VLSI implementations
2000-01-01 Corsonello, Pasquale; Perri, Stefania; Cocorullo, G.
Titolo | Data di pubblicazione | Autore(i) | File |
---|---|---|---|
High performance square rooting circuit using hybrid radix-2 adders | 1-gen-1999 | Corsonello, Pasquale; Perri, Stefania | |
A New High Performance Circuit for Statistical Carry Lookahead Addition | 1-gen-1999 | Corsonello, Pasquale; Perri, S.; Cocorullo, Giuseppe | |
An Hybrid Carry Select Statistical Carry Look-Ahead Adder | 1-gen-1999 | Corsonello, Pasquale; Perri, S; Cocorullo, Giuseppe | |
Educational design of high-performance arithmetic circuits on FPGA | 1-gen-1999 | Cappuccino, Gregorio; Cocorullo, Giuseppe; Corsonello, Pasquale; Perri, S. | |
Educational Design of high performance arithmetic circuits | 1-gen-1999 | Cappuccino, G; Cocorullo, G; Corsonello, Pasquale; Perri, Stefania | |
High speed self-timed pipelined datapath for square rooting | 1-gen-1999 | Cappuccino, Gregorio; Cocurullo, G; Corsonello, Pasquale; Perri, Stefania | |
A new type of fast, low-cost binary adder | 1-gen-2000 | Corsonello, Pasquale; V., Kantabutra; Perri, Stefania | |
Fast, low-cost adders using carry-strength | 1-gen-2000 | V., Kantabutra; Corsonello, Pasquale; Perri, Stefania | |
Fast, low-cost adders using carry-strength signals | 1-gen-2000 | Kantabutra, V.; Corsonello, Pasquale; Perri, S. | |
Low-cost redundant cell adders using carry-strength signals | 1-gen-2000 | Corsonello, Pasquale; Kantabutra, V.; Perri, S. | |
High speed division and square root modules for asynchronous datapaths | 1-gen-2000 | Cocorullo, Giuseppe; Corsonello, Pasquale; Perri, S; Cappuccino, Gregorio | |
High speed division and square root modules for asynchronous datapath | 1-gen-2000 | Cappuccino, G; Corsonello, Pasquale; Cocorullo, G; Perri, S. | |
VLSI implementation of low-power high-speed self-timed adder | 1-gen-2000 | Corsonello, Pasquale; Perri, S.; Cocorullo, G. | |
VLSI implementation of a low-power high-speed self-timed adder | 1-gen-2000 | Corsonello, Pasquale; Perri, Stefania; Cocorullo, G. | |
High speed division and square root modules for asynchronous datapaths | 1-gen-2000 | Cappuccino, G; Cocorullo, G.; Corsonello, Pasquale; Perri, Stefania | |
Design of 3 : 1 multiplexer standard cell | 1-gen-2000 | Corsonello, Pasquale; Perri, Stefania; Kantabutra, V. | |
Area-time-power tradeoff in VLSI cellular arrays implementations | 1-gen-2000 | Corsonello, Pasquale; Perri, S.; Cocorullo, Giuseppe | |
VLSI implementation of low-power high-speed self-timed adder | 1-gen-2000 | Cocorullo, Giuseppe; Perri, S; Corsonello, Pasquale | |
Designing high-speed asynchronous pipelines | 1-gen-2000 | Perri, Stefania; Corsonello, Pasquale; Cocorullo, Giuseppe | |
Area-time-power tradeoff in cellular arrays VLSI implementations | 1-gen-2000 | Corsonello, Pasquale; Perri, Stefania; Cocorullo, G. |
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