Sfoglia per Autore
Simulation of an improved neural based A/D converter
1993-01-01 Cappuccino, Gregorio; Corsonello, P.
Real-time processing of one-bit coded SAR data
1996-01-01 Cappuccino, Gregorio; Corsonello, Pasquale; Cocorullo, G.; Schirinzi, G.
Real-time processing of one-bit-coded SAR data
1996-01-01 Cappuccino, G; Cocorullo, Giuseppe; Corsonello, Pasquale; Schirinzi, G.
Design and demonstration of high throughput square rooting circuit
1996-01-01 Cappuccino, Gregorio; Corsonello, Pasquale; Cocorullo, Giuseppe
Design and demonstration of a real time processor for one-bit coded SAR signals
1996-01-01 Cappuccino, Gregorio; Cocorullo, Giuseppe; Corsonello, Pasquale; Schirinzi, G.
Real-Time Processing of one-bit-coded SAR data
1996-01-01 Cappuccino, G.; Cocorullo, G.; Corsonello, Pasquale; Schirinzi, G.
Estimation of power dissipation for lossy transmission lines in high speed VLSI CMOS circuits
1998-01-01 Cappuccino, Gregorio; Corsonello, Pasquale; Cocorullo, G.
Circuito integrato digitale per operazioni di somma binaria in sistemi asincroni ad alta velocità
1998-01-01 Cocorullo, G.; Corsonello, P.; Perri, Stefania
integrato digitale per operazioni di somma binaria in sistemi asincroni ad alta velocità
1998-01-01 Cocorullo, G.; Corsonello, Pasquale; Perri, S.
High performance VLSI modules for division and square root
1998-01-01 Cappuccino, Gregorio; Corsonello, Pasquale; Cocorullo, Giuseppe
CMOS buffer sizing for long on-chip interconnects
1998-01-01 Cappuccino, Gregorio; Cocorullo, Giuseppe; Corsonello, Pasquale
Efficient VLSI implementation of statistical carry lookahead adder
1998-01-01 Corsonello, Pasquale; Perri, Stefania; Cocorullo, Giuseppe
High throughput combined division square root unit
1998-01-01 Corsonello, Pasquale; Cappuccino, Gregorio; Cocorullo, Giuseppe
Estimation of Power Dissipation for Trasmission Lines in Deep-Submicrometer ULSI Circuits
1999-01-01 G., Cappuccino; Cocorullo, Giuseppe; Corsonello, Pasquale
High speed self-timed pipelined datapath for square root
1999-01-01 Cappuccino, G.; Cocorullo, Giuseppe; Corsonello, Pasquale; Perri, S.
A 56-bit self-timed adder for high speed asynchronous datapath
1999-01-01 Corsonello, Pasquale; Perri, S; Cocorullo, Giuseppe
56-bit self-timed adder for high speed asynchronous datapaths
1999-01-01 Corsonello, Pasquale; Perri, Stefania; Cocorullo, G.
New high performance circuit for statistical carry lookahead addition
1999-01-01 Corsonello, Pasquale; Perri, Stefania; Cocorullo, G.
Educational Design of high performance arithmetic circuits
1999-01-01 Cappuccino, G; Cocorullo, G; Corsonello, Pasquale; Perri, Stefania
High speed self-timed pipelined datapath for square rooting
1999-01-01 Cappuccino, Gregorio; Cocurullo, G; Corsonello, Pasquale; Perri, Stefania
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| Simulation of an improved neural based A/D converter | 1-gen-1993 | Cappuccino, Gregorio; Corsonello, P. | |
| Real-time processing of one-bit coded SAR data | 1-gen-1996 | Cappuccino, Gregorio; Corsonello, Pasquale; Cocorullo, G.; Schirinzi, G. | |
| Real-time processing of one-bit-coded SAR data | 1-gen-1996 | Cappuccino, G; Cocorullo, Giuseppe; Corsonello, Pasquale; Schirinzi, G. | |
| Design and demonstration of high throughput square rooting circuit | 1-gen-1996 | Cappuccino, Gregorio; Corsonello, Pasquale; Cocorullo, Giuseppe | |
| Design and demonstration of a real time processor for one-bit coded SAR signals | 1-gen-1996 | Cappuccino, Gregorio; Cocorullo, Giuseppe; Corsonello, Pasquale; Schirinzi, G. | |
| Real-Time Processing of one-bit-coded SAR data | 1-gen-1996 | Cappuccino, G.; Cocorullo, G.; Corsonello, Pasquale; Schirinzi, G. | |
| Estimation of power dissipation for lossy transmission lines in high speed VLSI CMOS circuits | 1-gen-1998 | Cappuccino, Gregorio; Corsonello, Pasquale; Cocorullo, G. | |
| Circuito integrato digitale per operazioni di somma binaria in sistemi asincroni ad alta velocità | 1-gen-1998 | Cocorullo, G.; Corsonello, P.; Perri, Stefania | |
| integrato digitale per operazioni di somma binaria in sistemi asincroni ad alta velocità | 1-gen-1998 | Cocorullo, G.; Corsonello, Pasquale; Perri, S. | |
| High performance VLSI modules for division and square root | 1-gen-1998 | Cappuccino, Gregorio; Corsonello, Pasquale; Cocorullo, Giuseppe | |
| CMOS buffer sizing for long on-chip interconnects | 1-gen-1998 | Cappuccino, Gregorio; Cocorullo, Giuseppe; Corsonello, Pasquale | |
| Efficient VLSI implementation of statistical carry lookahead adder | 1-gen-1998 | Corsonello, Pasquale; Perri, Stefania; Cocorullo, Giuseppe | |
| High throughput combined division square root unit | 1-gen-1998 | Corsonello, Pasquale; Cappuccino, Gregorio; Cocorullo, Giuseppe | |
| Estimation of Power Dissipation for Trasmission Lines in Deep-Submicrometer ULSI Circuits | 1-gen-1999 | G., Cappuccino; Cocorullo, Giuseppe; Corsonello, Pasquale | |
| High speed self-timed pipelined datapath for square root | 1-gen-1999 | Cappuccino, G.; Cocorullo, Giuseppe; Corsonello, Pasquale; Perri, S. | |
| A 56-bit self-timed adder for high speed asynchronous datapath | 1-gen-1999 | Corsonello, Pasquale; Perri, S; Cocorullo, Giuseppe | |
| 56-bit self-timed adder for high speed asynchronous datapaths | 1-gen-1999 | Corsonello, Pasquale; Perri, Stefania; Cocorullo, G. | |
| New high performance circuit for statistical carry lookahead addition | 1-gen-1999 | Corsonello, Pasquale; Perri, Stefania; Cocorullo, G. | |
| Educational Design of high performance arithmetic circuits | 1-gen-1999 | Cappuccino, G; Cocorullo, G; Corsonello, Pasquale; Perri, Stefania | |
| High speed self-timed pipelined datapath for square rooting | 1-gen-1999 | Cappuccino, Gregorio; Cocurullo, G; Corsonello, Pasquale; Perri, Stefania |
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