This article explores the instability of threshold voltage ( {VTH ) and dielectric breakdown in flexible n-type thin-film transistors (TFTs) featuring a bottom-gate Ti/Al2O3/indium–gallium–zinc-oxide (IGZO) structure. Measurements were performed in dark conditions at 25 0C on a set of devices with the same channel width ( W=280 µm) and different channel lengths (L) ranging from 100 down to 5 µm. Regarding the VTH instability, both hysteresis (applying VGS from −1 to 5 V and vice versa) and positive gate bias stress (applying VGS=5 V for 1000 s) data show a positive VTHshift ( ∆V TH) ascribed to electron trapping at the channel/oxide interface or within the bulk oxide. Our study also demonstrates that in some devices, the stress-induced ∆ V TH is fully recovered by applying VGS=-2 V for 1000 s as a result of releasing charges previously trapped during stress. Moreover, measurements highlight an increasing trend of both hysteresis- and stress-induced ∆ VTH for shorter channel devices. Consistently, time-dependent dielectric breakdown data (applying VG = 11 V) indicate a faster process in smaller devices. Then, overall results show lower reliability in more scaled devices, thus proving that a key challenge for the investigated technology is to realize reliable short-channel TFTs.

Threshold Voltage Instability and Dielectric Breakdown in Flexible Bottom-Gate Ti/Al2O3/IGZO Thin-Film Transistors

De Rosis D.;Vatalaro M.;Maccaronio V.;Crupi F.;De Rose R.
2025-01-01

Abstract

This article explores the instability of threshold voltage ( {VTH ) and dielectric breakdown in flexible n-type thin-film transistors (TFTs) featuring a bottom-gate Ti/Al2O3/indium–gallium–zinc-oxide (IGZO) structure. Measurements were performed in dark conditions at 25 0C on a set of devices with the same channel width ( W=280 µm) and different channel lengths (L) ranging from 100 down to 5 µm. Regarding the VTH instability, both hysteresis (applying VGS from −1 to 5 V and vice versa) and positive gate bias stress (applying VGS=5 V for 1000 s) data show a positive VTHshift ( ∆V TH) ascribed to electron trapping at the channel/oxide interface or within the bulk oxide. Our study also demonstrates that in some devices, the stress-induced ∆ V TH is fully recovered by applying VGS=-2 V for 1000 s as a result of releasing charges previously trapped during stress. Moreover, measurements highlight an increasing trend of both hysteresis- and stress-induced ∆ VTH for shorter channel devices. Consistently, time-dependent dielectric breakdown data (applying VG = 11 V) indicate a faster process in smaller devices. Then, overall results show lower reliability in more scaled devices, thus proving that a key challenge for the investigated technology is to realize reliable short-channel TFTs.
2025
Dielectric breakdown
hysteresis
negative gate bias recovery
positive gate bias stress
thin-film transistors (TFT)
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.11770/407079
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