IRIS
TACO LASSO, Edison Ramiro
 Distribuzione geografica
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Continente #
NA - Nord America 2.999
AS - Asia 2.012
EU - Europa 757
SA - Sud America 557
AF - Africa 82
Continente sconosciuto - Info sul continente non disponibili 72
OC - Oceania 5
Totale 6.484
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Nazione #
US - Stati Uniti d'America 2.880
SG - Singapore 789
BR - Brasile 373
CN - Cina 359
VN - Vietnam 325
IT - Italia 284
HK - Hong Kong 150
UA - Ucraina 120
BD - Bangladesh 86
DE - Germania 85
AR - Argentina 70
FR - Francia 65
IN - India 49
KR - Corea 46
CA - Canada 45
IQ - Iraq 39
EC - Ecuador 33
NL - Olanda 29
MX - Messico 27
FI - Finlandia 26
RU - Federazione Russa 25
SE - Svezia 25
GB - Regno Unito 24
TR - Turchia 24
CO - Colombia 21
ID - Indonesia 21
VE - Venezuela 19
PY - Paraguay 17
SN - Senegal 15
ZA - Sudafrica 15
MA - Marocco 14
BE - Belgio 12
CL - Cile 12
AT - Austria 11
ES - Italia 11
MY - Malesia 11
PH - Filippine 11
NP - Nepal 10
PK - Pakistan 10
TN - Tunisia 10
SA - Arabia Saudita 9
SV - El Salvador 8
AE - Emirati Arabi Uniti 7
EG - Egitto 7
GT - Guatemala 7
UZ - Uzbekistan 7
DZ - Algeria 6
KG - Kirghizistan 6
NI - Nicaragua 6
PE - Perù 6
ET - Etiopia 5
HN - Honduras 5
JO - Giordania 5
KE - Kenya 5
AL - Albania 4
AZ - Azerbaigian 4
CR - Costa Rica 4
IE - Irlanda 4
MD - Moldavia 4
OM - Oman 4
PA - Panama 4
PS - Palestinian Territory 4
RO - Romania 4
AU - Australia 3
BG - Bulgaria 3
BO - Bolivia 3
GE - Georgia 3
IL - Israele 3
JM - Giamaica 3
KZ - Kazakistan 3
LB - Libano 3
PL - Polonia 3
PR - Porto Rico 3
PT - Portogallo 3
SY - Repubblica araba siriana 3
TT - Trinidad e Tobago 3
TW - Taiwan 3
UY - Uruguay 3
AM - Armenia 2
BH - Bahrain 2
BY - Bielorussia 2
GA - Gabon 2
GR - Grecia 2
HR - Croazia 2
IR - Iran 2
JP - Giappone 2
KW - Kuwait 2
LV - Lettonia 2
QA - Qatar 2
TH - Thailandia 2
AF - Afghanistan, Repubblica islamica di 1
BB - Barbados 1
BN - Brunei Darussalam 1
BW - Botswana 1
CH - Svizzera 1
CW - ???statistics.table.value.countryCode.CW??? 1
CZ - Repubblica Ceca 1
DO - Repubblica Dominicana 1
GP - Guadalupe 1
HU - Ungheria 1
Totale 6.402
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Città #
Dallas 1.312
Singapore 308
San Jose 204
Council Bluffs 203
Ashburn 184
Hong Kong 141
Beijing 107
Ho Chi Minh City 107
Chandler 93
Hanoi 90
Milan 64
Boardman 59
Hefei 59
Jacksonville 58
New York 53
Lauterbourg 45
Seoul 44
San Mateo 35
Dearborn 34
Santa Clara 34
Los Angeles 28
São Paulo 28
Rome 27
Helsinki 24
Lawrence 22
Rende 22
Roxbury 22
Amsterdam 21
Shanghai 19
Des Moines 18
Haiphong 17
Cambridge 15
Dakar 15
Bremen 14
Da Nang 14
Chicago 13
Miano 13
Phoenix 13
Atlanta 12
Baghdad 12
Brussels 12
Quito 12
The Dalles 12
Izmir 11
Ogden 11
Rio de Janeiro 11
Tianjin 11
Toronto 11
Naples 10
San Francisco 10
London 9
Asunción 8
Buffalo 8
Guayaquil 8
Montreal 8
Ottawa 8
Vienna 8
Ann Arbor 7
Biên Hòa 7
Brooklyn 7
Buenos Aires 7
Campinas 7
Can Tho 7
Catanzaro 7
Columbus 7
Curitiba 7
Johannesburg 7
Longmont 7
Salvador 7
San Salvador 7
Tashkent 7
Bari 6
Bishkek 6
Seattle 6
Thái Nguyên 6
West Jordan 6
Abu Dhabi 5
Addis Ababa 5
Amman 5
Bengaluru 5
Brasília 5
Chennai 5
Fortaleza 5
Guatemala City 5
Hải Dương 5
Irvine 5
Kuala Lumpur 5
Managua 5
Mumbai 5
Nairobi 5
Omaha 5
Orem 5
Palermo 5
Santiago 5
Turin 5
Washington 5
Belo Horizonte 4
Bogotá 4
Bragança Paulista 4
Caracas 4
Totale 4.015
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Nome #
A 0.8-V, 1.54-pJ/940-MHz Dual-Mode Logic-Based 16×16-b Booth Multiplier in 16-nm FinFET 1.486
A 180 nm Low-Cost Operational Amplifier for IoT Applications 166
Low voltage logic circuits exploiting gate level dynamic body biasing in 28 nm UTBB FD-SOI 165
Extended Exploration of Low Granularity Back Biasing Control in 28nm UTBB FD-SOI Technology 143
An 88-fJ/40-MHz [0.4 V]-0.61-pJ/1-GHz [0.9 V] dual-mode logic 8 × 8 bit multiplier accumulator with a self-adjustment mechanism in 28-nm FD-SOI 142
Exploring back biasing opportunities in 28nm UTBB FD-SOI technology for subthreshold digital design 141
Gate-level body biasing for subthreshold logic circuits: analytical modeling and design guidelines 132
Dynamic gate-level body biasing for subthreshold digital design 132
Live demo: An 88FJ / 40 MHz [0.4V] - 0.61PJ / 1GHz [0.9V] dual mode logic 8x8-bit multiplier accumulator with a self-adjustment mechanism in 28 nm FD-SOI 132
Evaluation of Dual Mode Logic in 28nm FD-SOI technology 131
Robust dual mode pass logic (DMPL) for energy efficiency and high performance 126
Energy-delay tradeoffs of low-voltage dual mode logic in 28nm FD-SOI 125
Exploiting single-well design for energy-efficient ultra-wide voltage range Dual Mode Logic -based digital circuits in 28nm FD-SOI technology 115
Energy efficient self-adaptive dual mode logic address decoder 113
Improving speed and power characteristics of pulse-triggered flip-flops 112
Dual mode logic address decoder 111
XNOR-Bitcount Operation Exploiting Computing-In-Memory With STT-MRAMs 108
Towards Low-Power High-Performance Content-Addressable Memory: A Robust Precharge-Free Approach 104
High-Speed and Low-Energy Dual-Mode Logic based Single-Clack-Cycle Binary Comparator 98
Silicon Evaluation of Multimode Dual Mode Logic for PVT-Aware Datapaths 97
A Method for Mitigation of Droop Timing Errors Including a 500 MHz Droop Detector and Dual Mode Logic 95
Ultralow voltage finFET-versus TFET-based STT-MRAM cells for iot applications 95
IoT sensor nodes for air pollution monitoring: a review 94
Method for mitigation of droop timing errors including a droop detector and dual mode logic 92
Designing Precharge-Free Energy-Efficient Content-Addressable Memories 92
Low voltage Ripple Carry Adder with low-Granularity Dynamic Forward Back-Biasing in 28 nm UTBB FD-SOI 92
Live demonstration: A 0.8V, 1.54 pJ / 940 MHz dual mode logic-based 16x16-bit booth multiplier in 16-nm FinFET 92
Exploiting TFET-based technology for energy-efficient STT-MRAM cells 90
Ultra-low-voltage self-body biasing scheme and its application to basic arithmetic circuits 88
Low Matchline Voltage Swing Content-Addressable Memory Cell 87
DMTJ-Based Non-Volatile Ternary Content Addressable Memory for Energy-Efficient High-Performance Systems 85
720p-HD Gray-scale and Color Images Shape Recognition System Implementation on an FPGA Platform with a 1080pFull-HD HDMI Interface using a Hu Moments Algorithm 82
Valorization of ripe banana peels and cocoa pod husk hydrochars as green sustainable “low loss” dielectric materials 81
Energy-Efficient FinFET-Versus TFET-Based STT-MRAM Bitcells 81
Reconfigurable CMOS/STT-MTJ Non-Volatile Circuit for Logic-in-Memory Applications 80
FlexDML: High Utilization Configurable Multimode Arithmetic Units Featuring Dual Mode Logic 79
Live Demo: Silicon evaluation of multimode dual mode logic for PVT-aware datapaths 79
Effects of the technology scaling down to 28nm on Ultra-Low Voltage and Power OTA performance using TCAD simulations 74
Performance Benchmarking of TFET and FinFET Digital Circuits from a Synthesis-Based Perspective 73
Process variation-aware datapath employing dual mode logic 73
From 32 nm to TFET Technology: New Perspectives for Ultra-Scaled RF-DC Multiplier Circuits 71
Voltage and Technology Scaling of DMTJ-based STT-MRAMs for Energy-Efficient Embedded Memories 70
Efficiency of Dual Mode Logic in Nanoscale Technology Nodes 67
Design of an Air Pollution Monitoring System Based on a Low-Cost Sensor Node 67
Assessment of 10 nm Tunnel-FETs and FinFETs transistors for ultra-low voltage and high-speed digital circuits 67
Programmable All-in-One 4×8-/2×16-/1×32-Bits Dual Mode Logic Multiplier in 16 nm FinFET With Semi-Automatic Flow 65
RF-DC Multiplier for RF Energy Harvester based on 32nm and TFET technologies 64
Performance Benchmarking of FinFET- and TFET-Based STT-MRAM Bitcells Operating at Ultra-Low Voltages 63
Assessment of a universal logic gate and a full adder circuit based on CMOS-memristor technology 63
Voltage-Divider-Based Binary and Ternary Content-Addressable Memory (CAM) Exploiting Double-Barrier Magnetic Tunnel Junction 62
Non-Volatile Content-Addressable Memory for Energy-Efficient & High-Performance Search and Update Operations 61
Implementation of 32nm MD5 Crypto-Processor using Different Topographical Synthesis Techniques and Comparison with 500nm Node 56
IEEE CASS Tour Ecuador 2023 48
Process variation-aware datapath employing dual mode logic 41
Improved Design of a Low-Cost, Mobile and Modular Air Pollution Monitoring System 36
Totale 6.484
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Categoria #
all - tutte 29.143
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 29.143
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2021/2022176 0 0 0 17 7 2 6 36 4 3 31 70
2022/2023242 31 33 9 20 46 17 2 21 31 10 11 11
2023/2024161 18 8 14 6 7 7 3 13 18 21 10 36
2024/2025817 7 66 17 50 83 80 76 23 85 27 73 230
2025/20264.119 326 397 1.191 330 505 193 295 120 155 223 224 160
2026/2027658 167 103 117 271 0 0 0 0 0 0 0 0
Totale 6.484