IRIS
CAPPUCCINO, GREGORIO
 Distribuzione geografica
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Continente #
NA - Nord America 3.054
AS - Asia 3.016
EU - Europa 1.803
SA - Sud America 952
AF - Africa 219
OC - Oceania 7
Continente sconosciuto - Info sul continente non disponibili 2
AN - Antartide 1
Totale 9.054
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Nazione #
US - Stati Uniti d'America 2.899
SG - Singapore 1.072
BR - Brasile 692
UA - Ucraina 543
CN - Cina 542
VN - Vietnam 528
DE - Germania 368
IT - Italia 296
HK - Hong Kong 237
FI - Finlandia 146
FR - Francia 138
SE - Svezia 133
SN - Senegal 116
BD - Bangladesh 108
TR - Turchia 102
IN - India 86
AR - Argentina 84
KR - Corea 75
CA - Canada 67
MX - Messico 53
GB - Regno Unito 47
EC - Ecuador 44
IQ - Iraq 42
PK - Pakistan 37
CO - Colombia 36
RU - Federazione Russa 33
VE - Venezuela 31
ID - Indonesia 29
ZA - Sudafrica 27
CL - Cile 23
BE - Belgio 21
MA - Marocco 21
PY - Paraguay 19
SA - Arabia Saudita 17
UZ - Uzbekistan 17
PL - Polonia 16
MY - Malesia 15
EG - Egitto 14
DZ - Algeria 12
NP - Nepal 11
PE - Perù 11
PH - Filippine 11
TN - Tunisia 11
UY - Uruguay 11
JO - Giordania 10
JP - Giappone 10
NL - Olanda 10
RO - Romania 9
KE - Kenya 8
AU - Australia 7
CR - Costa Rica 7
ES - Italia 7
IE - Irlanda 7
JM - Giamaica 7
BY - Bielorussia 6
IR - Iran 6
KZ - Kazakistan 6
AE - Emirati Arabi Uniti 5
AZ - Azerbaigian 5
LB - Libano 5
DO - Repubblica Dominicana 4
ET - Etiopia 4
GE - Georgia 4
GT - Guatemala 4
QA - Qatar 4
TT - Trinidad e Tobago 4
AM - Armenia 3
AT - Austria 3
BA - Bosnia-Erzegovina 3
BH - Bahrain 3
KG - Kirghizistan 3
KH - Cambogia 3
KW - Kuwait 3
OM - Oman 3
PA - Panama 3
PS - Palestinian Territory 3
SV - El Salvador 3
CH - Svizzera 2
CZ - Repubblica Ceca 2
DK - Danimarca 2
LA - Repubblica Popolare Democratica del Laos 2
MN - Mongolia 2
NG - Nigeria 2
RS - Serbia 2
SK - Slovacchia (Repubblica Slovacca) 2
TW - Taiwan 2
AL - Albania 1
AO - Angola 1
AQ - Antartide 1
BB - Barbados 1
BN - Brunei Darussalam 1
BO - Bolivia 1
BS - Bahamas 1
CG - Congo 1
EE - Estonia 1
EU - Europa 1
GA - Gabon 1
GR - Grecia 1
HN - Honduras 1
HU - Ungheria 1
Totale 9.045
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Città #
Singapore 465
Jacksonville 399
Chandler 330
Hong Kong 228
San Jose 224
Dearborn 205
Ho Chi Minh City 192
Boardman 184
Council Bluffs 149
Helsinki 144
Ashburn 143
Beijing 133
Hanoi 124
Dallas 119
Dakar 115
San Mateo 104
Lawrence 85
Roxbury 85
Izmir 79
Lauterbourg 79
Seoul 75
Hefei 67
Shanghai 66
Ann Arbor 64
Des Moines 55
Falkenstein 55
Cambridge 53
New York 48
Ottawa 38
São Paulo 38
Milan 33
Rende 30
Wilmington 30
Ogden 29
Haiphong 28
Inglewood 26
Brussels 21
Grafing 20
Rio de Janeiro 20
Los Angeles 18
Seattle 17
Tianjin 17
Curitiba 16
Mexico City 16
Baghdad 15
Catania 15
Columbus 15
Da Nang 15
Quito 15
San Francisco 15
Santa Clara 15
Thái Bình 15
Cosenza 14
Frankfurt am Main 14
Guayaquil 14
Munich 14
Chicago 13
Guangzhou 13
Lahore 13
Medellín 13
Pune 13
Tashkent 13
Brooklyn 12
Dhaka 12
Houston 12
Hải Dương 12
Asunción 11
Chennai 11
Guarulhos 11
The Dalles 11
Caracas 10
Orem 10
Rome 10
Salvador 10
Santiago 10
Biên Hòa 9
Brasília 9
Campinas 9
Casablanca 9
Ribeirão Preto 9
Amman 8
Bogotá 8
Boston 8
Lamezia Terme 8
Montreal 8
Pisa 8
Porto Alegre 8
Shenzhen 8
Warsaw 8
Amsterdam 7
Atlanta 7
Bắc Giang 7
Cairo 7
Can Tho 7
Itajaí 7
Jeddah 7
Jiaxing 7
Karachi 7
Lima 7
Manaus 7
Totale 5.056
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Nome #
Advanced Lead-Acid battery management for low-TCO stationary storage systems 159
Design and demonstration of a real time processor for one-bit coded SAR signals 153
Adaptive Charging of Lead Acid batteries for Maximum Efficiency and Cycle Lifetime 150
RecyBat24: a dataset for detecting lithium-ion batteries in electronic waste disposal 147
A Review of Non-Destructive Techniques for Lithium-Ion Battery Performance Analysis 139
A new efficient SC integrator scheme for high-speed low power applications 137
High speed division and square root modules for asynchronous datapaths 131
CMOS buffer sizing for long on-chip interconnects 131
Correct Modelling of Nested Miller Compensated Amplifier for Discrete-Time Applications 128
Nested Miller compensation capacitor sizing rules for fast-settling amplifier design 125
Design approach for fast-settling two-stage amplifiers employing current-buffer Miller compensation 124
Design approach for high-bandwidth low-power three-stage operational amplifiers 122
High speed self-timed pipelined datapath for square rooting 122
Time-domain Model for Power Dissipation of CMOS Buffers Driving Lossy Lines 121
Design and demonstration of high throughput square rooting circuit 121
Advantages of efficiency-aware smart charging strategies for PEVs 120
High throughput combined division square root unit 120
Spent Lithium Battery Recycling: Traditional and Innovative Approaches 117
Corrections to Settling Time Optimization for Three-Stage CMOS Amplifier Topologies (vol 56, pg 2569, 2009) 117
Channel Widening Effect on the Effective Output Resistance of Deep-Submicron CMOS Line Driver and its Application to Repeater Insertion 117
Analysis of op-amp phase margin impact on SC Sigma Delta modulator performance 117
Buffer output capacitance effect on NoC line drivers performance 116
Sistema e metodo per la gestione della carica e scarica di accumulatori 115
Analysis of the Impact of High-Order Integrator Dynamics on SC Sigma-Delta Modulator Performances 114
High performance VLSI modules for division and square root 114
VLSI Implementation of a Fully Static CMOS 56-bit Self-Timed Adder Using Overlapped Execution Circuits 113
Circuito di retroazione a capacità commutate per amplificatori operazionali e metodo per pilotare la rete di retroazione 113
Simulation and timing performances of integrated waveguides for ultra-high speed interconnects 112
Impact of the variable output resistance on the transient response of LC transmission line CMOS buffers and its model 112
Custom Computing Reconfigurable Machine for High Performance Cellular Automata Processing 111
A Simple MOSFET Parasitic Capacitance Model and Its Application to Repeater Insertion Technique 110
A Time-domain Model for Power Dissipation of CMOS Buffers Driving Lossy Transmission Lines 110
Optimal Traction Battery Module Sizing for Cost-effective Second Life Reuse 110
Educational design of high-performance arithmetic circuits on FPGA 109
metodo per la caratterizzazione di accumulatori 107
Metodologia per la progettazione della rete di compensazione di un amplificatore innestato di Miller tramite contorno delle radici 105
Efficient Architecture for High-Speed Low-Power SC ΣΔ Modulators 104
Method for the characterisation of accumulators 103
Enhancement in Lithium Recovery from Spent Lithium Batteries by Nanofiltration Membranes 102
CMOS Sizing Rule for High Performance Long Interconnects 102
sistema e metodo per la misura e la predizione dell'efficienza di carica di accumulatori 102
Operating Mode Analysis of Deep-Submicron CMOS Buffers Driving Inductive Interconnects 102
Class-AB Output Stage Design for High-Speed Three-Stage Op-Amps 102
Performance of current mirror with high-k gate dielectrics 101
Electric Vehicles, Smart Charging and Smart Grids 101
Dynamic Power of CMOS Gates Driving Lossy Transmission Lines 101
Effective Models for Electronic Devices Interconnect: a final user perspective 100
Improved efficiency management strategy for battery-based energy storage systems 99
Estimation of power dissipation for transmission lines in deep-submicrometer ULSI circuits 98
Simulation of PCB Structures for Ultra Gigabit Communication 98
SETTLING-TIME-ORIENTED DESIGN PROCEDURE FOR TWO-STAGE AMPLIFIERS WITH CURRENT-BUFFER MILLER COMPENSATION 98
Design of a 75 nW, 0.5 V Subthreshold CMOS Operational Amplifier 97
SYSTEM AND METHOD FOR THE MEASUREMENT AND PREDICTION OF THE CHARGING EFFICIENCY OF ACCUMULATORS 95
Impact of charging efficiency variations on the effectiveness of variable-rate-based charging strategies for electric vehicles 94
Real-time processing of one-bit coded SAR data 94
Efficient switched-capacitor common-mode feedback circuit for high-speed low-power amplifiers 93
Large-Signal Settling Optimization of SC Circuits Using Two-Stage Amplifiers with Current-Buffer Miller Compensation 93
Potentiality of Variable-rate PEVs Charging Strategies for Smart Grids 91
Settling-Optimization-Based Design Approach for Three-Stage Nested-Miller Amplifiers 91
Output Resistance Scaling Model for Deep-Submicron Cmos Buffers for Timing Performance Optimisation 91
Settling Time Optimization for Three-Stage CMOS Amplifier Topologies 90
Integrated Waveguides for Ultra-High Speed Interconnects 89
Operating Region Modelling of Deep-submicron CMOS Buffers Driving Global Scope Inductive Interconnects 89
sistema e metodo di energy harvesting da vibrazioni meccaniche e radiazioni elettromagnetiche 89
Settling Time Optimisation for Two-Stage CMOS Amplifiers With Current-Buffer Miller Compensation - errata 88
METHOD FOR CHARACTERIZATION OF ACCUMULATORS AND RELATED 88
Settling Time Minimization of Operational Amplifiers 88
Design criterion for high-speed low-power SC circuits 87
Estimation of power dissipation for lossy transmission lines in high speed VLSI CMOS circuits 86
Design Procedure for Settling Time Minimization in Three-Stage Nested-Miller Amplifiers 83
Settling Time Optimisation for Two-Stage CMOS Amplifiers With Current-Buffer Miller Compensation 83
Slewing investigation and improved design rules for SC circuits employing two-stage amplifiers with current-buffer Miller compensation Istanbul, 2008, 2008, pp. - 81
sistema per lo scambio intelligente di energia elettrica tra la rete di distribuzione elettrica ed una batteria 80
Simulation of an improved neural based A/D converter 79
Design Considerations for Fast-Settling Two-Stage Miller-Compensated Operational Amplifiers 79
Progettazione e Realizzazione di un Sistema Cambio Elettroattuato per Kart da Competizione 79
Output Capacitance Effect on CMOS Line Repeaters 79
Fiber Bragg grating sensors based system for strain measurements 78
FDTD Analysis of Power Dissipation in VLSI Lossy Interconnects 77
Time-domain macromodel for lossy VLSI interconnects 76
Effect of Op-Amp Phase Margin on SC Sigma-Delta Modulator Performances 76
Settling-time-oriented design procedure for two-stage amplifiers with current-buffer Miller compensation 75
IEEE Real World Engineering Projects: Discovery-Based Curriculum Modules for First-Year Students 74
Design Methodology of Nested Miller Amplifiers for Small Capacitive Loads 74
Impact of Channel-Length Modulation on the Transient Response of CMOS Gates Driving LC-Lines 74
OPTIMAL SHUNT INDUCTANCE SIZING FOR HIGH PULSE FIDELITY WIDEBAND AMPLIFIERS 73
Operating Region Modelling and Timing Analysis of CMOS Gates Driving Transmission Line 72
Effect of the integrator settling behavior on SC ΣΔ modulator characteristics: A theoretical study 66
Efficiency-oriented smart energy management strategies for domestic energy storage systems integrated with EVs charging 66
Smart sorting systems of spent lithium batteries: Challenges and pathways to industrial adoption 32
Totale 9.091
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Categoria #
all - tutte 51.852
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 51.852
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/202177 0 0 0 0 0 0 0 0 0 0 0 77
2021/2022708 9 38 18 40 74 27 5 139 5 16 103 234
2022/2023739 110 51 16 96 71 71 2 166 97 17 13 29
2023/2024346 39 10 18 4 17 44 8 33 50 13 15 95
2024/20251.405 81 185 43 39 80 229 47 54 134 50 114 349
2025/20264.219 501 170 392 526 750 221 448 202 250 354 223 182
Totale 9.091