IRIS
CAPPUCCINO, GREGORIO
 Distribuzione geografica
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Continente #
AS - Asia 2.921
NA - Nord America 2.783
EU - Europa 1.751
SA - Sud America 952
AF - Africa 219
OC - Oceania 7
Continente sconosciuto - Info sul continente non disponibili 2
AN - Antartide 1
Totale 8.636
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Nazione #
US - Stati Uniti d'America 2.640
SG - Singapore 1.063
BR - Brasile 692
UA - Ucraina 543
VN - Vietnam 527
CN - Cina 513
DE - Germania 368
IT - Italia 247
HK - Hong Kong 235
FI - Finlandia 146
FR - Francia 138
SE - Svezia 133
SN - Senegal 116
TR - Turchia 102
IN - India 86
AR - Argentina 84
KR - Corea 75
CA - Canada 62
BD - Bangladesh 58
MX - Messico 53
GB - Regno Unito 45
EC - Ecuador 44
IQ - Iraq 42
PK - Pakistan 37
CO - Colombia 36
RU - Federazione Russa 33
VE - Venezuela 31
ID - Indonesia 29
ZA - Sudafrica 27
CL - Cile 23
BE - Belgio 21
MA - Marocco 21
PY - Paraguay 19
SA - Arabia Saudita 17
UZ - Uzbekistan 17
PL - Polonia 16
EG - Egitto 14
MY - Malesia 14
DZ - Algeria 12
PE - Perù 11
PH - Filippine 11
TN - Tunisia 11
UY - Uruguay 11
JO - Giordania 10
NP - Nepal 10
NL - Olanda 9
RO - Romania 9
JP - Giappone 8
KE - Kenya 8
AU - Australia 7
CR - Costa Rica 7
ES - Italia 7
IE - Irlanda 7
BY - Bielorussia 6
IR - Iran 6
KZ - Kazakistan 6
AE - Emirati Arabi Uniti 5
AZ - Azerbaigian 5
JM - Giamaica 5
LB - Libano 5
DO - Repubblica Dominicana 4
ET - Etiopia 4
GE - Georgia 4
QA - Qatar 4
AM - Armenia 3
AT - Austria 3
BA - Bosnia-Erzegovina 3
BH - Bahrain 3
KG - Kirghizistan 3
KH - Cambogia 3
KW - Kuwait 3
OM - Oman 3
PA - Panama 3
PS - Palestinian Territory 3
SV - El Salvador 3
TT - Trinidad e Tobago 3
CH - Svizzera 2
CZ - Repubblica Ceca 2
DK - Danimarca 2
GT - Guatemala 2
LA - Repubblica Popolare Democratica del Laos 2
MN - Mongolia 2
NG - Nigeria 2
RS - Serbia 2
SK - Slovacchia (Repubblica Slovacca) 2
TW - Taiwan 2
AL - Albania 1
AO - Angola 1
AQ - Antartide 1
BN - Brunei Darussalam 1
BO - Bolivia 1
BS - Bahamas 1
CG - Congo 1
EE - Estonia 1
EU - Europa 1
GA - Gabon 1
GR - Grecia 1
HU - Ungheria 1
IL - Israele 1
MD - Moldavia 1
Totale 8.629
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Città #
Singapore 464
Jacksonville 399
Chandler 330
Hong Kong 228
San Jose 210
Dearborn 205
Ho Chi Minh City 191
Boardman 184
Helsinki 144
Beijing 132
Ashburn 126
Hanoi 124
Dallas 117
Dakar 115
San Mateo 104
Lawrence 85
Roxbury 85
Izmir 79
Lauterbourg 79
Seoul 75
Hefei 66
Shanghai 66
Ann Arbor 64
Falkenstein 55
Des Moines 54
Cambridge 52
Ottawa 38
São Paulo 38
Milan 30
Rende 30
Wilmington 30
Ogden 29
Haiphong 28
Council Bluffs 26
Inglewood 26
Brussels 21
New York 21
Grafing 20
Rio de Janeiro 20
Los Angeles 17
Curitiba 16
Mexico City 16
Seattle 16
Tianjin 16
Baghdad 15
Catania 15
Da Nang 15
Quito 15
Thái Bình 15
Cosenza 14
Frankfurt am Main 14
Guayaquil 14
Munich 14
San Francisco 14
Guangzhou 13
Lahore 13
Medellín 13
Pune 13
Tashkent 13
Brooklyn 12
Hải Dương 12
Asunción 11
Chennai 11
Dhaka 11
Guarulhos 11
The Dalles 11
Caracas 10
Orem 10
Salvador 10
Santiago 10
Biên Hòa 9
Brasília 9
Campinas 9
Casablanca 9
Chicago 9
Columbus 9
Ribeirão Preto 9
Santa Clara 9
Amman 8
Bogotá 8
Houston 8
Montreal 8
Pisa 8
Porto Alegre 8
Shenzhen 8
Warsaw 8
Amsterdam 7
Boston 7
Bắc Giang 7
Cairo 7
Can Tho 7
Itajaí 7
Jeddah 7
Jiaxing 7
Karachi 7
Lamezia Terme 7
Lima 7
Manaus 7
Montevideo 7
Mumbai 7
Totale 4.834
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Nome #
Advanced Lead-Acid battery management for low-TCO stationary storage systems 157
Design and demonstration of a real time processor for one-bit coded SAR signals 152
Adaptive Charging of Lead Acid batteries for Maximum Efficiency and Cycle Lifetime 147
A Review of Non-Destructive Techniques for Lithium-Ion Battery Performance Analysis 134
A new efficient SC integrator scheme for high-speed low power applications 134
High speed division and square root modules for asynchronous datapaths 131
CMOS buffer sizing for long on-chip interconnects 131
Design approach for fast-settling two-stage amplifiers employing current-buffer Miller compensation 122
Design approach for high-bandwidth low-power three-stage operational amplifiers 121
Time-domain Model for Power Dissipation of CMOS Buffers Driving Lossy Lines 120
Design and demonstration of high throughput square rooting circuit 120
High throughput combined division square root unit 119
High speed self-timed pipelined datapath for square rooting 118
Corrections to Settling Time Optimization for Three-Stage CMOS Amplifier Topologies (vol 56, pg 2569, 2009) 116
Channel Widening Effect on the Effective Output Resistance of Deep-Submicron CMOS Line Driver and its Application to Repeater Insertion 115
Sistema e metodo per la gestione della carica e scarica di accumulatori 115
Advantages of efficiency-aware smart charging strategies for PEVs 114
Correct Modelling of Nested Miller Compensated Amplifier for Discrete-Time Applications 114
Analysis of the Impact of High-Order Integrator Dynamics on SC Sigma-Delta Modulator Performances 112
Nested Miller compensation capacitor sizing rules for fast-settling amplifier design 112
Impact of the variable output resistance on the transient response of LC transmission line CMOS buffers and its model 111
Analysis of op-amp phase margin impact on SC Sigma Delta modulator performance 111
High performance VLSI modules for division and square root 110
Simulation and timing performances of integrated waveguides for ultra-high speed interconnects 108
Buffer output capacitance effect on NoC line drivers performance 108
Custom Computing Reconfigurable Machine for High Performance Cellular Automata Processing 107
A Simple MOSFET Parasitic Capacitance Model and Its Application to Repeater Insertion Technique 107
Optimal Traction Battery Module Sizing for Cost-effective Second Life Reuse 107
Circuito di retroazione a capacità commutate per amplificatori operazionali e metodo per pilotare la rete di retroazione 106
metodo per la caratterizzazione di accumulatori 105
VLSI Implementation of a Fully Static CMOS 56-bit Self-Timed Adder Using Overlapped Execution Circuits 102
Educational design of high-performance arithmetic circuits on FPGA 102
A Time-domain Model for Power Dissipation of CMOS Buffers Driving Lossy Transmission Lines 102
Performance of current mirror with high-k gate dielectrics 101
Class-AB Output Stage Design for High-Speed Three-Stage Op-Amps 101
Dynamic Power of CMOS Gates Driving Lossy Transmission Lines 100
CMOS Sizing Rule for High Performance Long Interconnects 100
Efficient Architecture for High-Speed Low-Power SC ΣΔ Modulators 99
Operating Mode Analysis of Deep-Submicron CMOS Buffers Driving Inductive Interconnects 99
Method for the characterisation of accumulators 99
Spent Lithium Battery Recycling: Traditional and Innovative Approaches 98
Estimation of power dissipation for transmission lines in deep-submicrometer ULSI circuits 98
Simulation of PCB Structures for Ultra Gigabit Communication 98
Metodologia per la progettazione della rete di compensazione di un amplificatore innestato di Miller tramite contorno delle radici 98
Design of a 75 nW, 0.5 V Subthreshold CMOS Operational Amplifier 97
Improved efficiency management strategy for battery-based energy storage systems 97
Electric Vehicles, Smart Charging and Smart Grids 95
Real-time processing of one-bit coded SAR data 94
Effective Models for Electronic Devices Interconnect: a final user perspective 94
sistema e metodo per la misura e la predizione dell'efficienza di carica di accumulatori 94
Efficient switched-capacitor common-mode feedback circuit for high-speed low-power amplifiers 93
Large-Signal Settling Optimization of SC Circuits Using Two-Stage Amplifiers with Current-Buffer Miller Compensation 92
SYSTEM AND METHOD FOR THE MEASUREMENT AND PREDICTION OF THE CHARGING EFFICIENCY OF ACCUMULATORS 91
Operating Region Modelling of Deep-submicron CMOS Buffers Driving Global Scope Inductive Interconnects 89
METHOD FOR CHARACTERIZATION OF ACCUMULATORS AND RELATED 87
Settling Time Optimisation for Two-Stage CMOS Amplifiers With Current-Buffer Miller Compensation - errata 86
Impact of charging efficiency variations on the effectiveness of variable-rate-based charging strategies for electric vehicles 86
Potentiality of Variable-rate PEVs Charging Strategies for Smart Grids 86
Integrated Waveguides for Ultra-High Speed Interconnects 86
Settling-Optimization-Based Design Approach for Three-Stage Nested-Miller Amplifiers 85
Settling Time Minimization of Operational Amplifiers 84
Estimation of power dissipation for lossy transmission lines in high speed VLSI CMOS circuits 83
RecyBat24: a dataset for detecting lithium-ion batteries in electronic waste disposal 82
sistema e metodo di energy harvesting da vibrazioni meccaniche e radiazioni elettromagnetiche 82
SETTLING-TIME-ORIENTED DESIGN PROCEDURE FOR TWO-STAGE AMPLIFIERS WITH CURRENT-BUFFER MILLER COMPENSATION 82
Output Resistance Scaling Model for Deep-Submicron Cmos Buffers for Timing Performance Optimisation 82
Design criterion for high-speed low-power SC circuits 82
Slewing investigation and improved design rules for SC circuits employing two-stage amplifiers with current-buffer Miller compensation Istanbul, 2008, 2008, pp. - 80
Settling Time Optimization for Three-Stage CMOS Amplifier Topologies 80
Enhancement in Lithium Recovery from Spent Lithium Batteries by Nanofiltration Membranes 79
Design Considerations for Fast-Settling Two-Stage Miller-Compensated Operational Amplifiers 79
Settling Time Optimisation for Two-Stage CMOS Amplifiers With Current-Buffer Miller Compensation 79
Simulation of an improved neural based A/D converter 78
Fiber Bragg grating sensors based system for strain measurements 78
Output Capacitance Effect on CMOS Line Repeaters 78
FDTD Analysis of Power Dissipation in VLSI Lossy Interconnects 77
sistema per lo scambio intelligente di energia elettrica tra la rete di distribuzione elettrica ed una batteria 77
Progettazione e Realizzazione di un Sistema Cambio Elettroattuato per Kart da Competizione 77
Design Procedure for Settling Time Minimization in Three-Stage Nested-Miller Amplifiers 75
Effect of Op-Amp Phase Margin on SC Sigma-Delta Modulator Performances 75
Time-domain macromodel for lossy VLSI interconnects 74
IEEE Real World Engineering Projects: Discovery-Based Curriculum Modules for First-Year Students 74
Design Methodology of Nested Miller Amplifiers for Small Capacitive Loads 74
Settling-time-oriented design procedure for two-stage amplifiers with current-buffer Miller compensation 71
Impact of Channel-Length Modulation on the Transient Response of CMOS Gates Driving LC-Lines 70
OPTIMAL SHUNT INDUCTANCE SIZING FOR HIGH PULSE FIDELITY WIDEBAND AMPLIFIERS 69
Operating Region Modelling and Timing Analysis of CMOS Gates Driving Transmission Line 68
Effect of the integrator settling behavior on SC ΣΔ modulator characteristics: A theoretical study 65
Efficiency-oriented smart energy management strategies for domestic energy storage systems integrated with EVs charging 61
Smart sorting systems of spent lithium batteries: Challenges and pathways to industrial adoption 25
Totale 8.673
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Categoria #
all - tutte 49.528
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 49.528
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/2021171 0 0 0 0 0 0 0 0 0 89 5 77
2021/2022708 9 38 18 40 74 27 5 139 5 16 103 234
2022/2023739 110 51 16 96 71 71 2 166 97 17 13 29
2023/2024346 39 10 18 4 17 44 8 33 50 13 15 95
2024/20251.405 81 185 43 39 80 229 47 54 134 50 114 349
2025/20263.801 501 170 392 526 750 221 448 202 250 341 0 0
Totale 8.673