IRIS
FRUSTACI, Fabio
 Distribuzione geografica
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Continente #
NA - Nord America 1.823
EU - Europa 987
AS - Asia 335
AF - Africa 93
SA - Sud America 3
Continente sconosciuto - Info sul continente non disponibili 2
OC - Oceania 2
Totale 3.245
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Nazione #
US - Stati Uniti d'America 1.795
UA - Ucraina 391
DE - Germania 238
IT - Italia 144
CN - Cina 125
SG - Singapore 118
SE - Svezia 110
SN - Senegal 88
TR - Turchia 56
FI - Finlandia 29
CA - Canada 28
BE - Belgio 21
AT - Austria 13
IN - India 11
GB - Regno Unito 10
FR - Francia 9
TW - Taiwan 7
HK - Hong Kong 6
RS - Serbia 5
EG - Egitto 4
ID - Indonesia 4
NL - Olanda 4
KR - Corea 3
AU - Australia 2
ES - Italia 2
EU - Europa 2
GR - Grecia 2
LU - Lussemburgo 2
PL - Polonia 2
AR - Argentina 1
BD - Bangladesh 1
CL - Cile 1
IL - Israele 1
JP - Giappone 1
LT - Lituania 1
LV - Lettonia 1
MK - Macedonia 1
MY - Malesia 1
PE - Perù 1
PK - Pakistan 1
RU - Federazione Russa 1
SI - Slovenia 1
ZW - Zimbabwe 1
Totale 3.245
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Città #
Chandler 450
Jacksonville 256
Dearborn 129
San Mateo 97
Dakar 88
Singapore 79
Rende 71
Lawrence 64
Roxbury 64
Shanghai 54
Izmir 50
Ann Arbor 47
Bremen 43
Des Moines 43
Inglewood 32
Ogden 32
Cambridge 31
Helsinki 27
Ottawa 24
Brussels 21
Beijing 20
Ashburn 15
Brooklyn 15
Vienna 13
Wilmington 13
New York 9
San Francisco 8
Boardman 7
Bari 6
Florence 5
Los Angeles 5
Naples 5
Norwalk 5
Seattle 5
Amsterdam 4
Belgrade 4
Falls Church 4
Garbagnate Milanese 4
Syracuse 4
Taipei 4
Berlin 3
Brescia 3
Central 3
Cerzeto 3
Chennai 3
Edinburgh 3
Frankfurt am Main 3
Giza 3
Grafing 3
Guangzhou 3
Hyderabad 3
Istanbul 3
Jinan 3
Mascalucia 3
Messina 3
Nanjing 3
Rizziconi 3
Santa Clara 3
Seoul 3
Toronto 3
Bandung 2
Banqiao 2
Bologna 2
Canosa di Puglia 2
Castrolibero 2
Chiaravalle Centrale 2
Hefei 2
Hesperange 2
Lappeenranta 2
Le Pré-saint-gervais 2
London 2
Munich 2
Ningbo 2
Thessaloniki 2
Torre de' Passeri 2
Turin 2
Warsaw 2
Zhengzhou 2
Bhubaneswar 1
Capua 1
Changsha 1
Chirala 1
Dalian 1
Delhi 1
Dhaka 1
Dugenta 1
Fairfield 1
Haifa 1
Haikou 1
Hangzhou 1
Harare 1
Harbin 1
Heze 1
Houston 1
Hsinchu 1
Islamabad 1
Jakarta 1
Jiaxing 1
Jinhua 1
Krasnoyarsk 1
Totale 1.975
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Nome #
Analyzing noise-robustness of wide fan-in dynamic logic gates under process variations 73
SRAM for error-tolerant applications with dynamic energy-quality management in 28 nm CMOS 71
Low-power split-path data-driven dynamic logic 67
Analytical Delay Model Considering Variability Effects in Subthreshold Domain 67
Comparative analysis of yield optimized pulsed flip-flops 67
Multimodal background subtraction for high-performance embedded systems 64
Approximate SRAMs with Dynamic Energy-Quality Management 64
A new scheme to reduce leakage in deep-submicron cache memories with no extra dynamic consumption 64
A novel background subtraction method based on color invariants and grayscale levels 63
An efficient connected component labeling architecture for embedded systems 63
A new dynamic logic circuit design for an effective trade-off between noise-immunity, performance and energy dissipation 63
A low-leakage single ended 6T SRAM cell 62
Techniques for leakage energy reduction in deep submicrometer cache memories 61
Connected Component Analysis for Traffic Sign Recognition Embedded Processing Systems 60
A High-Speed FPGA-based True Random Number Generator using Metastability with Clock Managers 59
A New Dynamic Logic Circuit Design for an Effective Trade-off between Noise-Immunity, Performance and Energy Dissipation 58
A layout strategy for low-power voltage level shifters in 28nm UTBB FDSOI technology 57
Over/Undershooting Effects in Accurate Buffer Delay Model for Sub-Threshold Domain 56
Low Leakage SRAM Wordline Drivers for the 28nm UTBB FDSOI Technology 56
A new noise-tolerant dynamic logic circuit design 55
Design and evaluation of high-speed energy-aware carry skip adders 55
Designing Dynamic Carry Skip Adders: Analysis and Comparison 55
Designing Fast Convolutional Engines for Deep Learning Applications 55
An Efficient and Low-Cost Design Methodology to Improve SRAM-based FPGA Robustness in Space and Avionics Applications 54
Design of Energy Aware Adder Circuits Considering Random Intra-Die Process Variations 53
Design of efficient QCA multiplexers 53
A New optimized high-speed low-power Data-Driven Dynamic (D3L) 32-bit Kogge-Stone adder 53
Design of Real-Time FPGA-based Embedded System for Stereo Vision 53
Design of Efficient BCD adders in Quantum Dot Cellular Automata 52
Better-than-voltage scaling energy reduction in approximate SRAMs via bit dropping and bit reuse 52
An embedded machine vision system for an in-line quality check of assembly processes 52
Tapered-Vth Approach for Energy-Efficient CMOS Buffers 50
Accurate power estimation model for CMOS adders optimization 50
A new low-power high-speed single-clock-cycle binary comparator 50
A reconfigurable sense amplifier with 3X offset reduction in 28nm FDSOI CMOS 50
A High-Performance and Power-Efficient SIMD Convolution Engine for FPGAs 50
Color Invariant Study for Background Subtraction 47
A Self-Hosting Configuration Management System to Mitigate the Impact of Radiation-Induced Multi-Bit Upsets in SRAM-Based FPGAs 47
Designing High-Speed Adders in Power-Constrained Environments 47
An Efficient Hardware-Oriented Stereo Matching Algorithm 45
Approximate Multipliers with Dynamic Truncation for Energy Reduction via Graceful Quality Degradation 45
High-performance noise-tolerant circuit techniques for CMOS dynamic logic 44
Energy-Quality Scalable Adders Based on Nonzeroing Bit Truncation 43
Embedded surveillance system using background subtraction and Raspberry Pi 42
Energy‐efficient architecture for CNNs inference on heterogeneous FPGA 41
Accuracy Improved Low-Energy Multi-bit Approximate Adders in QCA 41
Exploiting Self-Reconfiguration Capability to Improve SRAM-based FPGA Robustness in Space and Avionics Applications 40
Multimodal background subtraction for high-performance embedded systems 40
An FPGA-Based Hardware Accelerator for the k-Nearest Neighbor Algorithm Implementation in Wearable Embedded Systems 39
Impact of process variations on pulsed flip-flops: Yield improving circuit-level techniques and comparative analysis 39
Efficient approximate adders for fpga-based data-paths 39
Impact of Process Variations on Flip-Flops Energy and Timing Characteristics 38
Energy-efficient single-clock-cycle binary comparator 37
Designing Energy-Efficient Approximate Multipliers 36
Parallel architecture of power-of-two multipliers for FPGAS 33
Tapered-VTH CMOS buffer design for improved energy efficiency in deep nanometer technology 32
Power supply noise in accurate delay model for the sub-threshold domain 32
A 32kb SRAM for error-free and error-tolerant applications with dynamic energy-quality management in 28nm CMOS 31
Exploring well configurations for voltage level converter design in 28 nm UTBB FDSOI technology 31
Impact of oxide thickness on performances of logic circuits: a predictive simulation study 31
Leakage Energy Reduction Techniques in Deep Submicron Cache Memories: A Comparative Study 29
VLSI design of low-leakage single-ended 6T SRAM cell 29
Design and analysis of a leading one detector-based approximate multiplier on FPGA 29
Multi-Bit Full Comparator Logic in Quantum-Dot Cellular Automata 27
Optimization and Evaluation of Tapered-VTH Approach for Energy-Efficient CMOS Buffers 25
Stereo vision architecture for heterogeneous systems-on-chip 25
Designing Low-Power and High-Speed FPGA-Based Binary Decision Tree Hardware Accelerators 23
Reconfigurable Convolution Architecture for Heterogeneous Systems-on-Chip 22
An explainable embedded neural system for on-board ship detection from optical satellite imagery 19
Design of Leading Zero Counters on FPGAs 19
Robust and High-Performance Machine Vision System for Automatic Quality Inspection in Assembly Processes 16
Design of Approximate Bilateral Filters for Image Denoising on FPGAs 11
Design of a Low-Power Super-Resolution Architecture for Virtual Reality Wearable Devices 10
HW/SW Codesign for Approximation-Aware Binary Neural Networks 9
Approximate Foveated-Based Super Resolution Method for Headset Displays 9
Welding defects classification through a Convolutional Neural Network 9
Improving the quality degradation of dynamically configurable approximate multipliers via data correlation 9
Exploring the Usage of Fast Carry Chains to Implement Multistage Ring Oscillators on FPGAs: Design and Characterization 8
Efficient implementation of signed multipliers on FPGAs 5
Unlocking Efficiency in BNNs: Global by Local Thresholding for Analog-based HW Accelerators 5
Efficient Addition Circuits Using Three-Gate Reconfigurable Field Effect Transistors 4
Approximate bilateral filters for real-time and low-energy imaging applications on FPGAs 4
Totale 3.373
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Categoria #
all - tutte 24.617
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 24.617
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2019/2020526 55 53 0 54 29 141 34 58 12 12 57 21
2020/2021441 64 1 52 59 3 50 5 70 24 61 7 45
2021/2022648 5 78 1 42 72 8 8 114 7 4 114 195
2022/2023991 92 93 15 120 124 119 5 157 121 38 60 47
2023/2024543 76 23 61 27 29 29 13 30 50 20 70 115
2024/202537 37 0 0 0 0 0 0 0 0 0 0 0
Totale 3.373