IRIS
FRUSTACI, FABIO
 Distribuzione geografica
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Continente #
NA - Nord America 3.593
AS - Asia 3.059
EU - Europa 1.572
SA - Sud America 811
AF - Africa 215
Continente sconosciuto - Info sul continente non disponibili 163
OC - Oceania 6
Totale 9.419
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Nazione #
US - Stati Uniti d'America 3.441
SG - Singapore 1.161
BR - Brasile 588
CN - Cina 569
VN - Vietnam 455
UA - Ucraina 407
IT - Italia 343
DE - Germania 288
HK - Hong Kong 252
FR - Francia 124
SE - Svezia 113
BD - Bangladesh 106
SN - Senegal 89
IN - India 85
TR - Turchia 82
AR - Argentina 74
KR - Corea 72
FI - Finlandia 68
CA - Canada 53
IQ - Iraq 49
ID - Indonesia 48
MX - Messico 47
GB - Regno Unito 38
EC - Ecuador 35
RU - Federazione Russa 34
CO - Colombia 33
ZA - Sudafrica 29
CL - Cile 25
PK - Pakistan 24
VE - Venezuela 24
BE - Belgio 22
NL - Olanda 21
SA - Arabia Saudita 21
UZ - Uzbekistan 21
MA - Marocco 20
AT - Austria 19
PL - Polonia 17
EG - Egitto 16
ES - Italia 16
MY - Malesia 14
TN - Tunisia 14
PY - Paraguay 12
RS - Serbia 12
CR - Costa Rica 11
DZ - Algeria 11
JP - Giappone 11
NP - Nepal 11
TW - Taiwan 10
PH - Filippine 9
KE - Kenya 8
PE - Perù 8
CH - Svizzera 7
ET - Etiopia 7
BG - Bulgaria 6
BO - Bolivia 6
HN - Honduras 6
JO - Giordania 6
KG - Kirghizistan 6
KZ - Kazakistan 6
PA - Panama 6
JM - Giamaica 5
PS - Palestinian Territory 5
UY - Uruguay 5
AM - Armenia 4
AZ - Azerbaigian 4
DO - Repubblica Dominicana 4
GR - Grecia 4
GT - Guatemala 4
LB - Libano 4
LT - Lituania 4
SV - El Salvador 4
AL - Albania 3
AO - Angola 3
AU - Australia 3
BY - Bielorussia 3
HU - Ungheria 3
IL - Israele 3
KW - Kuwait 3
LY - Libia 3
MD - Moldavia 3
NI - Nicaragua 3
OM - Oman 3
PR - Porto Rico 3
AE - Emirati Arabi Uniti 2
BA - Bosnia-Erzegovina 2
BB - Barbados 2
EU - Europa 2
GA - Gabon 2
IR - Iran 2
LK - Sri Lanka 2
LU - Lussemburgo 2
LV - Lettonia 2
MK - Macedonia 2
ML - Mali 2
RO - Romania 2
SC - Seychelles 2
SY - Repubblica araba siriana 2
TH - Thailandia 2
TT - Trinidad e Tobago 2
XK - ???statistics.table.value.countryCode.XK??? 2
Totale 9.233
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Città #
Singapore 511
Chandler 450
Jacksonville 258
San Jose 253
Council Bluffs 246
Hong Kong 241
Dallas 220
Ashburn 190
Boardman 175
Ho Chi Minh City 173
Beijing 149
Dearborn 129
San Mateo 97
Hanoi 90
Dakar 89
Rende 86
Lauterbourg 76
Hefei 70
Seoul 66
Lawrence 64
Roxbury 64
New York 60
Santa Clara 60
Shanghai 60
Helsinki 55
Izmir 50
Ann Arbor 47
São Paulo 46
Des Moines 44
Bremen 43
Los Angeles 39
The Dalles 38
Columbus 35
Milan 35
Inglewood 32
Ogden 32
Cambridge 31
Rome 26
Ottawa 25
Brussels 21
Da Nang 20
Brooklyn 19
Tashkent 19
Baghdad 18
Rio de Janeiro 18
Haiphong 17
Catanzaro 16
Frankfurt am Main 16
Mexico City 16
San Francisco 16
Munich 15
Tianjin 15
Vienna 15
Bari 14
Biên Hòa 14
Dhaka 14
Quito 14
Wilmington 13
London 12
Omaha 12
Warsaw 12
Belo Horizonte 11
Buffalo 11
Chennai 11
Guangzhou 11
Istanbul 11
Quảng Ngãi 11
Turku 11
Jakarta 10
Jeddah 10
Johannesburg 10
Amsterdam 9
Campinas 9
Hyderabad 9
Orem 9
San José 9
Toronto 9
Asunción 8
Guarulhos 8
Mumbai 8
Naples 8
Salvador 8
Shenzhen 8
Addis Ababa 7
Bogotá 7
Brasília 7
Caracas 7
Chicago 7
Florence 7
Guayaquil 7
Hải Dương 7
Lahore 7
Medellín 7
Nairobi 7
New Delhi 7
Ninh Bình 7
Phoenix 7
Ribeirão Preto 7
Santiago 7
Sorocaba 7
Totale 5.129
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Nome #
A High-Performance and Power-Efficient SIMD Convolution Engine for FPGAs 172
A High-Speed FPGA-based True Random Number Generator using Metastability with Clock Managers 171
Multimodal background subtraction for high-performance embedded systems 157
An efficient connected component labeling architecture for embedded systems 145
A new dynamic logic circuit design for an effective trade-off between noise-immunity, performance and energy dissipation 145
Over/Undershooting Effects in Accurate Buffer Delay Model for Sub-Threshold Domain 144
A layout strategy for low-power voltage level shifters in 28nm UTBB FDSOI technology 143
A New Dynamic Logic Circuit Design for an Effective Trade-off between Noise-Immunity, Performance and Energy Dissipation 143
Analyzing noise-robustness of wide fan-in dynamic logic gates under process variations 142
A new scheme to reduce leakage in deep-submicron cache memories with no extra dynamic consumption 142
A new low-power high-speed single-clock-cycle binary comparator 141
SRAM for error-tolerant applications with dynamic energy-quality management in 28 nm CMOS 141
Designing Dynamic Carry Skip Adders: Analysis and Comparison 140
A reconfigurable sense amplifier with 3X offset reduction in 28nm FDSOI CMOS 140
An FPGA-Based Hardware Accelerator for the k-Nearest Neighbor Algorithm Implementation in Wearable Embedded Systems 139
A New optimized high-speed low-power Data-Driven Dynamic (D3L) 32-bit Kogge-Stone adder 137
Low-power split-path data-driven dynamic logic 136
Techniques for leakage energy reduction in deep submicrometer cache memories 135
A low-leakage single ended 6T SRAM cell 134
Analytical Delay Model Considering Variability Effects in Subthreshold Domain 133
A new noise-tolerant dynamic logic circuit design 133
A novel background subtraction method based on color invariants and grayscale levels 131
Design of Real-Time FPGA-based Embedded System for Stereo Vision 129
A High-Speed and Low-Power DSP-Based TRNG for FPGA Implementations 128
An explainable embedded neural system for on-board ship detection from optical satellite imagery 127
Comparative analysis of yield optimized pulsed flip-flops 126
Accuracy Improved Low-Energy Multi-bit Approximate Adders in QCA 126
Connected Component Analysis for Traffic Sign Recognition Embedded Processing Systems 124
Design of Energy Aware Adder Circuits Considering Random Intra-Die Process Variations 121
Better-than-voltage scaling energy reduction in approximate SRAMs via bit dropping and bit reuse 121
An Efficient and Low-Cost Design Methodology to Improve SRAM-based FPGA Robustness in Space and Avionics Applications 118
Approximate SRAMs with Dynamic Energy-Quality Management 118
Accurate power estimation model for CMOS adders optimization 117
Low Leakage SRAM Wordline Drivers for the 28nm UTBB FDSOI Technology 116
Design and evaluation of high-speed energy-aware carry skip adders 115
Designing Low-Power and High-Speed FPGA-Based Binary Decision Tree Hardware Accelerators 114
Design of efficient QCA multiplexers 114
Energy-Quality Scalable Adders Based on Nonzeroing Bit Truncation 114
High-performance noise-tolerant circuit techniques for CMOS dynamic logic 113
Multimodal background subtraction for high-performance embedded systems 113
A Self-Hosting Configuration Management System to Mitigate the Impact of Radiation-Induced Multi-Bit Upsets in SRAM-Based FPGAs 111
Energy‐efficient architecture for CNNs inference on heterogeneous FPGA 109
Impact of Process Variations on Flip-Flops Energy and Timing Characteristics 108
An Efficient Hardware-Oriented Stereo Matching Algorithm 107
Embedded surveillance system using background subtraction and Raspberry Pi 106
Efficient approximate adders for fpga-based data-paths 106
Design of Approximate Bilateral Filters for Image Denoising on FPGAs 105
Design of a Low-Power Super-Resolution Architecture for Virtual Reality Wearable Devices 105
Tapered-Vth Approach for Energy-Efficient CMOS Buffers 104
Design of Efficient BCD adders in Quantum Dot Cellular Automata 104
Designing High-Speed Adders in Power-Constrained Environments 104
An embedded machine vision system for an in-line quality check of assembly processes 104
Color Invariant Study for Background Subtraction 100
Exploring the Usage of Fast Carry Chains to Implement Multistage Ring Oscillators on FPGAs: Design and Characterization 98
Tapered-VTH CMOS buffer design for improved energy efficiency in deep nanometer technology 97
Approximate Multipliers with Dynamic Truncation for Energy Reduction via Graceful Quality Degradation 97
Impact of process variations on pulsed flip-flops: Yield improving circuit-level techniques and comparative analysis 97
A 32kb SRAM for error-free and error-tolerant applications with dynamic energy-quality management in 28nm CMOS 96
Designing Fast Convolutional Engines for Deep Learning Applications 96
Stereo vision architecture for heterogeneous systems-on-chip 96
Designing Energy-Efficient Approximate Multipliers 94
Approximate bilateral filters for real-time and low-energy imaging applications on FPGAs 94
Multi-Bit Full Comparator Logic in Quantum-Dot Cellular Automata 91
Power supply noise in accurate delay model for the sub-threshold domain 91
Exploiting Self-Reconfiguration Capability to Improve SRAM-based FPGA Robustness in Space and Avionics Applications 89
Energy-efficient single-clock-cycle binary comparator 88
Design of Leading Zero Counters on FPGAs 86
Parallel architecture of power-of-two multipliers for FPGAS 86
A High-Speed FPGA-Based True Random Number Generator Using Metastability With Clock Managers 85
Design and analysis of a leading one detector-based approximate multiplier on FPGA 85
VLSI design of low-leakage single-ended 6T SRAM cell 84
Approximate Foveated-Based Super Resolution Method for Headset Displays 83
Exploring well configurations for voltage level converter design in 28 nm UTBB FDSOI technology 82
Leakage Energy Reduction Techniques in Deep Submicron Cache Memories: A Comparative Study 81
Reconfigurable Convolution Architecture for Heterogeneous Systems-on-Chip 81
Impact of oxide thickness on performances of logic circuits: a predictive simulation study 80
Efficient implementation of signed multipliers on FPGAs 79
HW/SW Codesign for Approximation-Aware Binary Neural Networks 75
Unlocking Efficiency in BNNs: Global by Local Thresholding for Analog-based HW Accelerators 71
Robust and High-Performance Machine Vision System for Automatic Quality Inspection in Assembly Processes 69
Welding defects classification through a Convolutional Neural Network 69
Improving the quality degradation of dynamically configurable approximate multipliers via data correlation 67
Optimization and Evaluation of Tapered-VTH Approach for Energy-Efficient CMOS Buffers 60
Efficient Addition Circuits Using Three-Gate Reconfigurable Field Effect Transistors 59
COCOWEARS: A framework for COntinuum COmputing WEARable Systems 44
Streamlining Serial Communication Protocol Development on SoC Platforms for Code Reusability 38
Leveraging Highly Approximated Multipliers in DNN Inference 24
A Codesign Framework for the Development of Next Generation Wearable Computing Systems 20
Robust Human Activity Prediction Through Multi-View Sensor Data Integration 16
Totale 9.419
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Categoria #
all - tutte 54.917
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 54.917
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2021/2022565 0 0 1 42 72 8 8 114 7 4 114 195
2022/2023991 92 93 15 120 124 119 5 157 121 38 60 47
2023/2024543 76 23 61 27 29 29 13 30 50 20 70 115
2024/20251.520 44 224 20 70 118 82 83 128 226 66 130 329
2025/20264.146 457 201 361 435 672 267 438 207 324 359 180 245
2026/2027417 283 110 24 0 0 0 0 0 0 0 0 0
Totale 9.419