COCORULLO, Giuseppe
 Distribuzione geografica
Continente #
NA - Nord America 7.749
AS - Asia 6.311
EU - Europa 3.689
SA - Sud America 1.959
AF - Africa 477
Continente sconosciuto - Info sul continente non disponibili 64
OC - Oceania 17
Totale 20.266
Nazione #
US - Stati Uniti d'America 7.426
SG - Singapore 2.420
BR - Brasile 1.429
UA - Ucraina 1.377
CN - Cina 1.217
VN - Vietnam 1.120
DE - Germania 869
SE - Svezia 332
IT - Italia 302
FR - Francia 254
HK - Hong Kong 249
TR - Turchia 238
SN - Senegal 229
BD - Bangladesh 207
AR - Argentina 205
CA - Canada 179
KR - Corea 176
FI - Finlandia 163
IN - India 152
IQ - Iraq 96
GB - Regno Unito 89
EC - Ecuador 83
ID - Indonesia 80
CO - Colombia 69
ZA - Sudafrica 63
MX - Messico 59
RU - Federazione Russa 59
PK - Pakistan 58
VE - Venezuela 47
BE - Belgio 43
MA - Marocco 43
PY - Paraguay 39
PL - Polonia 37
UZ - Uzbekistan 35
AT - Austria 33
CL - Cile 32
SA - Arabia Saudita 31
NP - Nepal 28
DZ - Algeria 25
PE - Perù 25
NL - Olanda 23
EG - Egitto 22
MY - Malesia 22
TN - Tunisia 22
JO - Giordania 21
KE - Kenya 21
AE - Emirati Arabi Uniti 20
PH - Filippine 20
UY - Uruguay 19
ES - Italia 17
AU - Australia 16
ET - Etiopia 16
KZ - Kazakistan 16
CR - Costa Rica 15
DO - Repubblica Dominicana 14
JP - Giappone 14
JM - Giamaica 13
CZ - Repubblica Ceca 12
LB - Libano 11
RO - Romania 11
AZ - Azerbaigian 10
IL - Israele 10
OM - Oman 10
PA - Panama 10
EU - Europa 8
BO - Bolivia 7
BY - Bielorussia 7
GA - Gabon 7
HN - Honduras 6
NI - Nicaragua 6
RS - Serbia 6
SV - El Salvador 6
AL - Albania 5
IE - Irlanda 5
KG - Kirghizistan 5
KW - Kuwait 5
MN - Mongolia 5
PS - Palestinian Territory 5
QA - Qatar 5
AM - Armenia 4
BG - Bulgaria 4
CH - Svizzera 4
GE - Georgia 4
GT - Guatemala 4
HR - Croazia 4
KH - Cambogia 4
LY - Libia 4
MD - Moldavia 4
PT - Portogallo 4
SK - Slovacchia (Repubblica Slovacca) 4
TT - Trinidad e Tobago 4
AO - Angola 3
BH - Bahrain 3
CI - Costa d'Avorio 3
GR - Grecia 3
HU - Ungheria 3
IR - Iran 3
MK - Macedonia 3
MU - Mauritius 3
NG - Nigeria 3
Totale 20.166
Città #
Jacksonville 1.003
Singapore 987
Chandler 761
Council Bluffs 565
Dearborn 532
San Jose 526
Boardman 441
Ho Chi Minh City 410
Ashburn 347
Dallas 328
Beijing 316
San Mateo 272
Hanoi 267
Hong Kong 238
Dakar 229
Roxbury 207
Lawrence 206
Izmir 197
Lauterbourg 179
Seoul 174
Helsinki 156
Shanghai 155
Hefei 140
Des Moines 134
Ottawa 123
New York 114
São Paulo 109
Ann Arbor 107
Cambridge 95
Santa Clara 70
Wilmington 65
Milan 59
Ogden 59
Inglewood 56
Grafing 54
Haiphong 51
Brooklyn 48
Falkenstein 47
Columbus 44
Munich 44
Brussels 42
Baghdad 41
Rende 41
Rio de Janeiro 41
Los Angeles 40
Da Nang 38
Tianjin 38
Bremen 35
Quito 34
Rome 33
Tashkent 31
Curitiba 30
Seattle 29
San Francisco 28
Dhaka 27
Guayaquil 27
Belo Horizonte 25
Brasília 25
Buenos Aires 24
Guangzhou 24
Biên Hòa 23
Caracas 23
Hải Dương 23
Warsaw 23
Orem 22
The Dalles 22
Toronto 22
Frankfurt am Main 21
Guarulhos 21
London 21
Thái Bình 21
Vienna 21
Cape Town 20
Lahore 20
Shenzhen 20
Amman 19
Campinas 19
Medellín 19
Johannesburg 18
Bogotá 17
Chennai 17
Mumbai 17
Nairobi 17
Porto Alegre 17
Addis Ababa 16
Chicago 16
Jakarta 16
Lima 16
Omaha 16
Casablanca 15
Montevideo 15
Boston 14
Riyadh 14
Santiago 14
Thái Nguyên 14
Amsterdam 13
Buffalo 13
Houston 13
Jiaxing 13
New Delhi 13
Totale 11.282
Nome #
A high-performance fully reconfigurable FPGA-based 2D convolution processor 214
A novel ICA-based hardware system for reconfigurable and portable BCI 191
A Matrix Product Accelerator for Field Programmable Systems on Chip 190
A high-speed energy-efficient 64-bit reconfigurable binary adder 168
A FPSoC for wavelet-based image compression 166
A 56-bit self-timed adder for high speed asynchronous datapath 165
Design and demonstration of a real time processor for one-bit coded SAR signals 162
56-bit self-timed adder for high speed asynchronous datapaths 158
Multimodal background subtraction for high-performance embedded systems 157
"Measurement of the thermo-Optic Coefficient in Bulk and Waveguiding Structures 153
64-bit reconfigurable adder for low power media processing 145
A new dynamic logic circuit design for an effective trade-off between noise-immunity, performance and energy dissipation 145
"Silicon on Silicon Rib Waveguides whith a High-Confining Ion-Implanted Lower Cladding" 144
Opto-electrical modelling and optimization study of a novel IBC c-Si solar cell 144
A New Dynamic Logic Circuit Design for an Effective Trade-off between Noise-Immunity, Performance and Energy Dissipation 143
A new scheme to reduce leakage in deep-submicron cache memories with no extra dynamic consumption 141
A Microchip Integrated Sensor for the Monitoring of High Concentration Photo-voltaic Solar Modules 140
A microchip integrated wireless sensor for the monitoring of high concentration photo-voltaic solar cells 139
An efficient wavelet image encoder for FPGA-based design 137
A measurement technique to obtain the recombination lifetime profile in epi layers at any injection level 136
Correct Modelling of Nested Miller Compensated Amplifier for Discrete-Time Applications 136
CMOS buffer sizing for long on-chip interconnects 135
Nested Miller compensation capacitor sizing rules for fast-settling amplifier design 135
High speed division and square root modules for asynchronous datapaths 133
Techniques for leakage energy reduction in deep submicrometer cache memories 133
A new noise-tolerant dynamic logic circuit design 133
A hub motors choice strategy for an electric four independent wheel drive vehicle 132
A novel background subtraction method based on color invariants and grayscale levels 131
A New High Performance Circuit for Statistical Carry Lookahead Addition 131
An example of System on Chip design for biomedical applications: Bruxism therapy 130
Design and demonstration of high throughput square rooting circuit 128
An efficient self-timed adder realized using conventional CMOS standard cells 128
"Thermo-optic Effect Exploitation in Silicon Microstructures" 128
Design approach for high-bandwidth low-power three-stage operational amplifiers 127
Design approach for fast-settling two-stage amplifiers employing current-buffer Miller compensation 127
Analysis of the Impact of High-Order Integrator Dynamics on SC Sigma-Delta Modulator Performances 125
Variable precision arithmetic circuits for FPGA-based multimedia processors 125
High throughput combined division square root unit 124
A Temperature All-Silicon Micro-Sensor Based on the Thermo-Optic Effect 124
"Amorphous Silicon-Based Guided-Wave Passive and Active Devices for Silicon 124
Time-domain Model for Power Dissipation of CMOS Buffers Driving Lossy Lines 123
High performance VLSI modules for division and square root 123
Analysis of op-amp phase margin impact on SC Sigma Delta modulator performance 123
Hybrid carry-select statistical carry look-ahead adder 122
Hardware implementation of a Test Lab for Smart Home environments 121
Educational Design of high performance arithmetic circuits 120
VLSI Implementation of a Fully Static CMOS 56-bit Self-Timed Adder Using Overlapped Execution Circuits 120
A new test structure for in-depth lifetime profiling of thin Si epitaxial layers 120
Low bit rate image compression core for onboard space applications 119
Corrections to Settling Time Optimization for Three-Stage CMOS Amplifier Topologies (vol 56, pg 2569, 2009) 118
Buffer output capacitance effect on NoC line drivers performance 117
A system for simultaneous signals acquisition of EMG activity, bite force, and muscle pain, reveals the rotation of synergistic activity in the human jaw elevator muscles 114
Design of efficient QCA multiplexers 113
A Simple MOSFET Parasitic Capacitance Model and Its Application to Repeater Insertion Technique 113
High-performance noise-tolerant circuit techniques for CMOS dynamic logic 113
Multimodal background subtraction for high-performance embedded systems 113
Adaptive Census transform: A novel hardware-oriented stereovision algorithm 112
Custom Computing Reconfigurable Machine for High Performance Cellular Automata Processing 112
Efficient VLSI implementation of statistical carry lookahead adder 112
A Time-domain Model for Power Dissipation of CMOS Buffers Driving Lossy Transmission Lines 112
High-voltage bipolar mode JFET with normally off characteristics 111
Educational design of high-performance arithmetic circuits on FPGA 111
VLSI circuits for low-power high-speed asynchronous addition 109
Design and Implementation of a Low Bit-Rate On-Board Satellite Wavelet-based Compression Core 109
Positive Bias Temperature Instability in nMOSFETs with ultra-thin Hf-silicate gate dielectrics 109
Room-temperature single-electron effects in Si nanocrystal memories 108
New high performance circuit for statistical carry lookahead addition 107
An Efficient Hardware-Oriented Stereo Matching Algorithm 107
High speed self-timed pipelined datapath for square root 106
Dynamic Power of CMOS Gates Driving Lossy Transmission Lines 106
Embedded surveillance system using background subtraction and Raspberry Pi 106
Metodologia per la progettazione della rete di compensazione di un amplificatore innestato di Miller tramite contorno delle radici 106
Room-temperature single-electron effects in silicon nanocrystal memories 106
Fully-Synthesizable Reconfigurable Multiplier for High-Performance Multimedia Processors 106
CMOS Sizing Rule for High Performance Long Interconnects 105
Design of Efficient BCD adders in Quantum Dot Cellular Automata 104
An embedded machine vision system for an in-line quality check of assembly processes 104
High speed division and square root modules for asynchronous datapath 103
Area-delay efficient binary adders in QCA 103
Design and Implementation of a 90nm low bit-rate image compression core 103
Circuito integrato digitale per operazioni di somma binaria in sistemi asincroni ad alta velocità 103
Area-time-power tradeoff in VLSI cellular arrays implementations 101
SETTLING-TIME-ORIENTED DESIGN PROCEDURE FOR TWO-STAGE AMPLIFIERS WITH CURRENT-BUFFER MILLER COMPENSATION 101
Estimation of power dissipation for transmission lines in deep-submicrometer ULSI circuits 100
Real-time processing of one-bit coded SAR data 100
Color Invariant Study for Background Subtraction 100
Design of efficient binary comparators in Quantum-Dot Cellular Automata 100
Settling Time Optimization for Three-Stage CMOS Amplifier Topologies 99
Output Resistance Scaling Model for Deep-Submicron Cmos Buffers for Timing Performance Optimisation 98
A two-dimensional analytical model of homojunction GaAs BMFET structures 96
Efficient switched-capacitor common-mode feedback circuit for high-speed low-power amplifiers 96
Fiber-Optic Microsensor for Micro-Wave And Millimeter-Wave Electric-Fields 96
GaAs P-I-N Diodes Made by Zn Diffusion Out A Spin-On Film 96
An Embedded System for EEG Acquisition and Processing for Brain Computer Interface Applications 96
Thermo-Optical Modulation at 1.5 micron in Silicon Etalon 95
Settling-Optimization-Based Design Approach for Three-Stage Nested-Miller Amplifiers 95
Estimation of Power Dissipation for Trasmission Lines in Deep-Submicrometer ULSI Circuits 94
Design Procedure for Settling Time Minimization in Three-Stage Nested-Miller Amplifiers 93
Silicon Fabryƒ{Perot filters for WDM systems channels monitoring 92
Settling Time Optimisation for Two-Stage CMOS Amplifiers With Current-Buffer Miller Compensation - errata 92
Totale 12.139
Categoria #
all - tutte 123.391
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 123.391


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2021/20221.647 0 134 1 105 180 66 18 343 14 18 271 497
2022/20231.736 245 115 22 211 222 180 4 341 240 47 50 59
2023/2024855 116 33 64 25 43 81 20 63 108 25 36 241
2024/20252.514 125 457 84 106 196 180 64 135 343 61 235 528
2025/20268.730 1.122 378 695 1.119 1.656 469 906 380 536 731 357 381
2026/2027679 538 141 0 0 0 0 0 0 0 0 0 0
Totale 20.266