IRIS
CORSONELLO, Pasquale
 Distribuzione geografica
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Continente #
NA - Nord America 9.366
AS - Asia 7.925
EU - Europa 4.422
SA - Sud America 2.345
AF - Africa 550
Continente sconosciuto - Info sul continente non disponibili 230
OC - Oceania 19
AN - Antartide 1
Totale 24.858
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Nazione #
US - Stati Uniti d'America 8.924
SG - Singapore 3.031
BR - Brasile 1.692
CN - Cina 1.475
UA - Ucraina 1.418
VN - Vietnam 1.307
DE - Germania 937
IT - Italia 678
HK - Hong Kong 464
SE - Svezia 347
FR - Francia 316
BD - Bangladesh 295
TR - Turchia 249
SN - Senegal 232
AR - Argentina 218
CA - Canada 214
KR - Corea 208
IN - India 207
FI - Finlandia 177
IQ - Iraq 124
GB - Regno Unito 120
ID - Indonesia 102
MX - Messico 101
EC - Ecuador 100
CO - Colombia 97
RU - Federazione Russa 84
ZA - Sudafrica 80
PK - Pakistan 77
VE - Venezuela 74
AT - Austria 54
CL - Cile 54
MA - Marocco 53
BE - Belgio 52
PY - Paraguay 43
UZ - Uzbekistan 42
PL - Polonia 41
NL - Olanda 40
SA - Arabia Saudita 39
TN - Tunisia 39
EG - Egitto 37
ES - Italia 36
PH - Filippine 31
MY - Malesia 30
JP - Giappone 28
PE - Perù 28
DZ - Algeria 27
NP - Nepal 27
KZ - Kazakistan 24
UY - Uruguay 24
JO - Giordania 22
CR - Costa Rica 21
DO - Repubblica Dominicana 20
AE - Emirati Arabi Uniti 19
JM - Giamaica 19
IL - Israele 18
KE - Kenya 18
ET - Etiopia 17
AU - Australia 16
KG - Kirghizistan 13
OM - Oman 13
HN - Honduras 12
PA - Panama 12
BO - Bolivia 11
NI - Nicaragua 11
AZ - Azerbaigian 10
LB - Libano 10
RO - Romania 10
RS - Serbia 10
AL - Albania 9
CH - Svizzera 9
CZ - Repubblica Ceca 9
BG - Bulgaria 8
EU - Europa 8
SV - El Salvador 8
BY - Bielorussia 7
KW - Kuwait 7
MK - Macedonia 7
AM - Armenia 6
CI - Costa d'Avorio 6
GE - Georgia 6
GR - Grecia 6
GT - Guatemala 6
IE - Irlanda 6
TH - Thailandia 6
BB - Barbados 5
HR - Croazia 5
LT - Lituania 5
LV - Lettonia 5
LY - Libia 5
TW - Taiwan 5
XK - ???statistics.table.value.countryCode.XK??? 5
AO - Angola 4
BA - Bosnia-Erzegovina 4
GA - Gabon 4
IR - Iran 4
KH - Cambogia 4
LK - Sri Lanka 4
MD - Moldavia 4
PR - Porto Rico 4
PS - Palestinian Territory 4
Totale 24.564
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Città #
Singapore 1.283
Chandler 954
Jacksonville 944
Council Bluffs 660
San Jose 633
Boardman 505
Dallas 503
Dearborn 486
Ashburn 476
Ho Chi Minh City 467
Hong Kong 453
Beijing 392
San Mateo 323
Hanoi 292
Dakar 232
Lawrence 208
Roxbury 208
Lauterbourg 205
Seoul 204
Izmir 183
Hefei 182
Shanghai 172
New York 159
Ann Arbor 151
Santa Clara 144
Helsinki 141
Des Moines 140
Ottawa 129
Rende 128
São Paulo 127
Cambridge 113
Milan 109
Bremen 85
Columbus 80
Ogden 75
Los Angeles 74
Inglewood 72
Munich 65
The Dalles 64
Haiphong 61
Da Nang 58
Rome 56
Brooklyn 55
Rio de Janeiro 51
Wilmington 51
Grafing 50
Tianjin 46
Brussels 45
Guangzhou 41
London 39
San Francisco 38
Baghdad 37
Frankfurt am Main 37
Tashkent 37
Dhaka 35
Quito 35
Seattle 34
Vienna 34
Toronto 33
Biên Hòa 31
Catanzaro 30
Falkenstein 30
Guayaquil 30
Turku 30
Chicago 29
Mexico City 29
Johannesburg 28
Campinas 27
Phoenix 27
Warsaw 27
Belo Horizonte 26
Buffalo 25
Chennai 25
Omaha 25
Orem 25
Curitiba 24
Caracas 23
Hải Dương 23
Bogotá 22
Brasília 22
Naples 22
Salvador 22
Thái Bình 22
Amsterdam 21
Lahore 21
Mumbai 21
Nuremberg 21
Amman 20
Asunción 20
Guarulhos 20
Medellín 20
Lima 19
Montevideo 19
Santiago 19
Bari 18
Can Tho 18
Cape Town 18
Istanbul 18
Porto Alegre 18
Shenzhen 18
Totale 13.647
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Nome #
A high-performance fully reconfigurable FPGA-based 2D convolution processor 214
A 2.6 nW, 0.45 V Temperature-Compensated Subthreshold CMOS Voltage Reference 206
A Matrix Product Accelerator for Field Programmable Systems on Chip 190
A High-Performance and Power-Efficient SIMD Convolution Engine for FPGAs 172
A High-Speed FPGA-based True Random Number Generator using Metastability with Clock Managers 171
A high-speed energy-efficient 64-bit reconfigurable binary adder 169
Approximate Down-Sampling Strategy for Power-Constrained Intelligent Systems 169
A FPSoC for wavelet-based image compression 167
Aggressive Approximation of the SoftMax Function for Power-Efficient Hardware Implementations 167
A new reconfigurable coarse-grain architecture for multimedia applications 166
A 56-bit self-timed adder for high speed asynchronous datapath 165
Design and demonstration of a real time processor for one-bit coded SAR signals 163
An efficient hardware-oriented single-pass approach for connected component analysis 161
56-bit self-timed adder for high speed asynchronous datapaths 158
Multimodal background subtraction for high-performance embedded systems 157
A high flexible early-late gate bit synchronizer in FPGA-based software defined radios 150
A high flexible 8-bit and 16-bit SIMD soft microcontroller for FPGAs 146
An efficient connected component labeling architecture for embedded systems 145
64-bit reconfigurable adder for low power media processing 145
A new dynamic logic circuit design for an effective trade-off between noise-immunity, performance and energy dissipation 145
Over/Undershooting Effects in Accurate Buffer Delay Model for Sub-Threshold Domain 144
A Low-Power Sub-Nanosecond Standard-Cells Based Adder 143
A layout strategy for low-power voltage level shifters in 28nm UTBB FDSOI technology 143
A New Dynamic Logic Circuit Design for an Effective Trade-off between Noise-Immunity, Performance and Energy Dissipation 143
A microchip integrated wireless sensor for the monitoring of high concentration photo-voltaic solar cells 142
Analyzing noise-robustness of wide fan-in dynamic logic gates under process variations 142
A new scheme to reduce leakage in deep-submicron cache memories with no extra dynamic consumption 142
A new low-power high-speed single-clock-cycle binary comparator 141
A matrix product coprocessor for FPGA embedded soft processors 141
Radial-Shaped Single Varactor-Tuned Phasing Line for Active Reflectarrays 140
A Microchip Integrated Sensor for the Monitoring of High Concentration Photo-voltaic Solar Modules 140
An efficient wavelet image encoder for FPGA-based design 137
Low-power split-path data-driven dynamic logic 136
Fast and Wide Range Voltage Conversion in Multi-Supply Voltage Designs 136
Techniques for leakage energy reduction in deep submicrometer cache memories 135
CMOS buffer sizing for long on-chip interconnects 135
Compressed Sensing Approach for Physiological Signals: A Review 134
A low-leakage single ended 6T SRAM cell 134
High speed division and square root modules for asynchronous datapaths 133
Analytical Delay Model Considering Variability Effects in Subthreshold Domain 133
A new noise-tolerant dynamic logic circuit design 133
A parallel connected component labeling architecture for heterogeneous systems-on-chip 132
A novel background subtraction method based on color invariants and grayscale levels 131
A New High Performance Circuit for Statistical Carry Lookahead Addition 131
A new charge-pump based countermeasure against differential power analysis 130
Design of Real-Time FPGA-based Embedded System for Stereo Vision 129
A High-Speed and Low-Power DSP-Based TRNG for FPGA Implementations 128
Design and demonstration of high throughput square rooting circuit 128
An efficient self-timed adder realized using conventional CMOS standard cells 128
An explainable embedded neural system for on-board ship detection from optical satellite imagery 127
Design of a real-time face detection architecture for heterogeneous systems-on-chips 127
Variable precision arithmetic circuits for FPGA-based multimedia processors 126
Comparative analysis of yield optimized pulsed flip-flops 126
Accuracy Improved Low-Energy Multi-bit Approximate Adders in QCA 126
High throughput combined division square root unit 125
Low-Power Level Shifter for Multi-Supply Voltage Designs 125
High speed self-timed pipelined datapath for square rooting 124
A programmable carrier phase independent symbol timing recovery circuit for QPSK/OQPSK signals 124
Connected Component Analysis for Traffic Sign Recognition Embedded Processing Systems 124
High performance square rooting circuit using hybrid radix-2 adders 123
High performance VLSI modules for division and square root 123
Hybrid carry-select statistical carry look-ahead adder 122
Novel varactor-loaded phasing line for reflectarray unit cell with large reconfigurability frequency range 122
An efficient convolution engine based on the à-trous spatial pyramid pooling 122
Design of Energy Aware Adder Circuits Considering Random Intra-Die Process Variations 121
VLSI Implementation of a Fully Static CMOS 56-bit Self-Timed Adder Using Overlapped Execution Circuits 121
Educational Design of high performance arithmetic circuits 120
New methodology for the design of efficient binary addition circuits in QCA 120
Low bit rate image compression core for onboard space applications 120
Design of a reconfigurable reflectarray based on a varactor tuned element 118
A low-cost PSoC architecture for long FFT 118
An Efficient and Low-Cost Design Methodology to Improve SRAM-based FPGA Robustness in Space and Avionics Applications 118
Efficient deconvolution architecture for heterogeneous systems-on-chip 118
Accurate power estimation model for CMOS adders optimization 117
Low Leakage SRAM Wordline Drivers for the 28nm UTBB FDSOI Technology 116
Design of High-Speed Low-Power Parallel-prefix Adder Trees in Nanometer Technologies 115
Design of efficient QCA multiplexers 114
Active reflectarray element with large reconfigurability frequency range 114
Energy-Quality Scalable Adders Based on Nonzeroing Bit Truncation 114
High-performance noise-tolerant circuit techniques for CMOS dynamic logic 113
Beam-Scanning Reflectarray based on a single varactor-tuned element 113
Multimodal background subtraction for high-performance embedded systems 113
Adaptive Census transform: A novel hardware-oriented stereovision algorithm 112
Custom Computing Reconfigurable Machine for High Performance Cellular Automata Processing 112
Efficient VLSI implementation of statistical carry lookahead adder 112
VLSI circuits for low-power high-speed asynchronous addition 111
Fast, low-cost adders using carry-strength signals 111
A new type of fast, low-cost binary adder 111
Educational design of high-performance arithmetic circuits on FPGA 111
A Self-Hosting Configuration Management System to Mitigate the Impact of Radiation-Induced Multi-Bit Upsets in SRAM-Based FPGAs 111
Abnormal ECG Detection in Wearable Devices Using Compressed Learning 110
Cost-Effective Low-power Processor-In-Memory-based Reconfigurable datapath for Multimedia Applications 110
ECG Signals Analysis based on Compressed Sensing and Learning Techniques for Heart Disease Recognition 109
LEWIS project: An integrated system of monitoring, early warning and mitigation of landslides risk 109
Design and Implementation of a Low Bit-Rate On-Board Satellite Wavelet-based Compression Core 109
Energy‐efficient architecture for CNNs inference on heterogeneous FPGA 109
Impact of Process Variations on Flip-Flops Energy and Timing Characteristics 108
New high performance circuit for statistical carry lookahead addition 107
An Efficient Hardware-Oriented Stereo Matching Algorithm 107
High speed self-timed pipelined datapath for square root 106
Totale 13.214
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Categoria #
all - tutte 143.474
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 143.474
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2021/20221.682 0 0 1 129 193 62 13 382 18 16 305 563
2022/20232.130 250 158 26 256 295 246 7 376 264 79 94 79
2023/20241.147 144 54 103 43 51 84 27 95 127 35 101 283
2024/20253.488 115 570 86 139 293 173 113 265 483 135 327 789
2025/202611.099 1.296 515 926 1.307 1.965 672 1.134 534 769 902 493 586
2026/20271.041 712 250 79 0 0 0 0 0 0 0 0 0
Totale 24.858