IRIS
PERRI, Stefania
 Distribuzione geografica
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Continente #
NA - Nord America 8.824
AS - Asia 6.470
EU - Europa 3.855
SA - Sud America 1.882
AF - Africa 457
Continente sconosciuto - Info sul continente non disponibili 204
OC - Oceania 16
Totale 21.708
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Nazione #
US - Stati Uniti d'America 8.382
SG - Singapore 2.459
BR - Brasile 1.362
CN - Cina 1.222
UA - Ucraina 1.124
VN - Vietnam 1.011
IT - Italia 857
DE - Germania 731
HK - Hong Kong 382
BD - Bangladesh 275
SE - Svezia 255
FR - Francia 251
CA - Canada 207
TR - Turchia 198
SN - Senegal 186
IN - India 179
AR - Argentina 176
KR - Corea 162
FI - Finlandia 134
GB - Regno Unito 113
IQ - Iraq 107
ID - Indonesia 85
RU - Federazione Russa 84
CO - Colombia 80
EC - Ecuador 75
MX - Messico 74
ZA - Sudafrica 67
PK - Pakistan 63
VE - Venezuela 60
AT - Austria 49
BE - Belgio 43
MA - Marocco 42
CL - Cile 41
PL - Polonia 38
PY - Paraguay 37
ES - Italia 35
EG - Egitto 34
NL - Olanda 33
TN - Tunisia 33
SA - Arabia Saudita 32
UZ - Uzbekistan 31
IL - Israele 28
PH - Filippine 26
CR - Costa Rica 24
JO - Giordania 24
NP - Nepal 24
PE - Perù 23
MY - Malesia 22
JP - Giappone 20
DZ - Algeria 19
KE - Kenya 19
KZ - Kazakistan 18
GT - Guatemala 17
AE - Emirati Arabi Uniti 16
ET - Etiopia 16
UY - Uruguay 16
DO - Repubblica Dominicana 15
JM - Giamaica 15
NI - Nicaragua 15
SV - El Salvador 14
PR - Porto Rico 13
RO - Romania 13
AU - Australia 12
GP - Guadalupe 12
KG - Kirghizistan 12
PA - Panama 11
AZ - Azerbaigian 10
HN - Honduras 10
OM - Oman 10
BO - Bolivia 9
CW - ???statistics.table.value.countryCode.CW??? 9
RS - Serbia 9
CZ - Repubblica Ceca 8
LB - Libano 8
TT - Trinidad e Tobago 8
AL - Albania 7
BY - Bielorussia 7
EU - Europa 7
SC - Seychelles 7
TW - Taiwan 7
AM - Armenia 6
BG - Bulgaria 6
CH - Svizzera 6
CI - Costa d'Avorio 6
IE - Irlanda 6
MK - Macedonia 6
GR - Grecia 5
HR - Croazia 5
LT - Lituania 5
LY - Libia 5
XK - ???statistics.table.value.countryCode.XK??? 5
BA - Bosnia-Erzegovina 4
DK - Danimarca 4
GE - Georgia 4
IR - Iran 4
KW - Kuwait 4
LK - Sri Lanka 4
LV - Lettonia 4
PS - Palestinian Territory 4
AO - Angola 3
Totale 21.465
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Città #
Singapore 1.029
Chandler 854
Council Bluffs 794
Jacksonville 735
Ashburn 656
San Jose 656
Dallas 414
Boardman 398
Ho Chi Minh City 383
Dearborn 374
Hong Kong 372
Beijing 325
San Mateo 237
Hanoi 228
Milan 193
Dakar 186
Lawrence 170
Roxbury 169
Lauterbourg 162
Seoul 158
New York 146
Izmir 144
Hefei 142
Shanghai 142
Santa Clara 136
Des Moines 118
Ottawa 111
Ann Arbor 109
Rende 105
Helsinki 103
São Paulo 103
Cambridge 85
Bremen 75
Chicago 75
Columbus 72
Los Angeles 65
Inglewood 60
Rome 59
The Dalles 59
Ogden 58
Munich 51
Brooklyn 50
Haiphong 45
Phoenix 42
Rio de Janeiro 41
Grafing 37
Brussels 36
Guangzhou 35
Baghdad 34
Da Nang 34
Wilmington 34
London 33
Tianjin 33
Dhaka 32
Miano 32
Vienna 32
Toronto 31
Catanzaro 30
Quito 30
Seattle 28
San Francisco 27
Tashkent 27
Turku 27
Warsaw 27
Buffalo 25
Campinas 25
Charlotte 25
Johannesburg 25
Naples 25
Frankfurt am Main 24
Atlanta 23
Mexico City 23
Chennai 22
Amman 21
Belo Horizonte 21
Guayaquil 21
Omaha 21
Orem 21
Asunción 20
Biên Hòa 20
Bogotá 20
Curitiba 20
Caracas 19
Mumbai 19
Shenzhen 19
Bari 18
Hải Dương 18
Istanbul 18
Thái Bình 18
Lahore 17
Porto Alegre 17
San José 17
Amsterdam 16
Brasília 16
Guarulhos 16
Lima 16
Nuremberg 16
Addis Ababa 15
Guatemala City 15
Managua 15
Totale 11.995
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Nome #
A high-performance fully reconfigurable FPGA-based 2D convolution processor 226
A Matrix Product Accelerator for Field Programmable Systems on Chip 204
A FPSoC for wavelet-based image compression 190
A High-Performance and Power-Efficient SIMD Convolution Engine for FPGAs 185
A High-Speed FPGA-based True Random Number Generator using Metastability with Clock Managers 182
A high-speed energy-efficient 64-bit reconfigurable binary adder 179
A 56-bit self-timed adder for high speed asynchronous datapath 176
Approximate Down-Sampling Strategy for Power-Constrained Intelligent Systems 176
A new reconfigurable coarse-grain architecture for multimedia applications 173
Aggressive Approximation of the SoftMax Function for Power-Efficient Hardware Implementations 173
56-bit self-timed adder for high speed asynchronous datapaths 168
An efficient hardware-oriented single-pass approach for connected component analysis 167
Multimodal background subtraction for high-performance embedded systems 166
A high flexible 8-bit and 16-bit SIMD soft microcontroller for FPGAs 164
A microchip integrated wireless sensor for the monitoring of high concentration photo-voltaic solar cells 161
A high flexible early-late gate bit synchronizer in FPGA-based software defined radios 161
An efficient connected component labeling architecture for embedded systems 158
64-bit reconfigurable adder for low power media processing 156
Over/Undershooting Effects in Accurate Buffer Delay Model for Sub-Threshold Domain 155
A Low-Power Sub-Nanosecond Standard-Cells Based Adder 155
A layout strategy for low-power voltage level shifters in 28nm UTBB FDSOI technology 155
A matrix product coprocessor for FPGA embedded soft processors 152
A new dynamic logic circuit design for an effective trade-off between noise-immunity, performance and energy dissipation 152
A New Dynamic Logic Circuit Design for an Effective Trade-off between Noise-Immunity, Performance and Energy Dissipation 151
A new scheme to reduce leakage in deep-submicron cache memories with no extra dynamic consumption 151
A new low-power high-speed single-clock-cycle binary comparator 149
Analyzing noise-robustness of wide fan-in dynamic logic gates under process variations 148
A Microchip Integrated Sensor for the Monitoring of High Concentration Photo-voltaic Solar Modules 146
Fast and Wide Range Voltage Conversion in Multi-Supply Voltage Designs 145
Techniques for leakage energy reduction in deep submicrometer cache memories 144
An efficient wavelet image encoder for FPGA-based design 144
Low-power split-path data-driven dynamic logic 143
Analytical Delay Model Considering Variability Effects in Subthreshold Domain 142
Accurate power estimation model for CMOS adders optimization 140
A parallel connected component labeling architecture for heterogeneous systems-on-chip 140
High speed division and square root modules for asynchronous datapaths 139
A High-Speed and Low-Power DSP-Based TRNG for FPGA Implementations 138
An explainable embedded neural system for on-board ship detection from optical satellite imagery 137
A novel background subtraction method based on color invariants and grayscale levels 136
Design of Real-Time FPGA-based Embedded System for Stereo Vision 136
A new charge-pump based countermeasure against differential power analysis 135
New methodology for the design of efficient binary addition circuits in QCA 135
A New High Performance Circuit for Statistical Carry Lookahead Addition 135
Accuracy Improved Low-Energy Multi-bit Approximate Adders in QCA 135
Comparative analysis of yield optimized pulsed flip-flops 134
Design of a real-time face detection architecture for heterogeneous systems-on-chips 134
Variable precision arithmetic circuits for FPGA-based multimedia processors 133
An efficient self-timed adder realized using conventional CMOS standard cells 133
Low-Power Level Shifter for Multi-Supply Voltage Designs 132
Learning Style Identification by CHAEA Junior Questionnaire and Artificial Neural Network Method: A Case Study 132
High speed self-timed pipelined datapath for square rooting 131
A programmable carrier phase independent symbol timing recovery circuit for QPSK/OQPSK signals 131
An efficient convolution engine based on the à-trous spatial pyramid pooling 131
Design of efficient QCA multiplexers 130
Connected Component Analysis for Traffic Sign Recognition Embedded Processing Systems 130
High performance square rooting circuit using hybrid radix-2 adders 129
Efficient deconvolution architecture for heterogeneous systems-on-chip 129
Design of High-Speed Low-Power Parallel-prefix Adder Trees in Nanometer Technologies 128
VLSI Implementation of a Fully Static CMOS 56-bit Self-Timed Adder Using Overlapped Execution Circuits 128
Hybrid carry-select statistical carry look-ahead adder 127
A Fast Carry Chain Adder for Virtex-5 FPGAs 127
Low bit rate image compression core for onboard space applications 127
An Efficient and Low-Cost Design Methodology to Improve SRAM-based FPGA Robustness in Space and Avionics Applications 127
Design of Energy Aware Adder Circuits Considering Random Intra-Die Process Variations 126
Educational Design of high performance arithmetic circuits 126
Fast, low-cost adders using carry-strength signals 126
A Self-Hosting Configuration Management System to Mitigate the Impact of Radiation-Induced Multi-Bit Upsets in SRAM-Based FPGAs 123
Energy-Quality Scalable Adders Based on Nonzeroing Bit Truncation 123
Low Leakage SRAM Wordline Drivers for the 28nm UTBB FDSOI Technology 123
High-performance noise-tolerant circuit techniques for CMOS dynamic logic 121
Multimodal background subtraction for high-performance embedded systems 121
VLSI circuits for low-power high-speed asynchronous addition 118
Adaptive Census transform: A novel hardware-oriented stereovision algorithm 118
Custom Computing Reconfigurable Machine for High Performance Cellular Automata Processing 117
Efficient VLSI implementation of statistical carry lookahead adder 117
An Efficient Hardware-Oriented Stereo Matching Algorithm 116
Educational design of high-performance arithmetic circuits on FPGA 116
Area-delay efficient binary adders in QCA 115
A new type of fast, low-cost binary adder 115
Gate-level body biasing technique for high-speed sub-threshold CMOS logic gates 115
Energy‐efficient architecture for CNNs inference on heterogeneous FPGA 115
Design and evaluation of an energy-delay-area efficient datapath for coarse-grain reconfigurable computing systems 114
Dynamic Power of CMOS Gates Driving Lossy Transmission Lines 114
Impact of Process Variations on Flip-Flops Energy and Timing Characteristics 114
FPGA Design of Transposed Convolutions for Deep Learning Using High-Level Synthesis 113
Design of a Low-Power Super-Resolution Architecture for Virtual Reality Wearable Devices 113
Runtime Reconfigurable Hardware Accelerator for Energy-Efficient Transposed Convolutions 113
New high performance circuit for statistical carry lookahead addition 113
Design and Implementation of a Low Bit-Rate On-Board Satellite Wavelet-based Compression Core 113
Design of Approximate Bilateral Filters for Image Denoising on FPGAs 112
Design of Efficient BCD adders in Quantum Dot Cellular Automata 112
Embedded surveillance system using background subtraction and Raspberry Pi 112
Designing High-Speed Adders in Power-Constrained Environments 112
Fully-Synthesizable Reconfigurable Multiplier for High-Performance Multimedia Processors 112
Fast and energy-efficient Manchester Carry by-pass adders 112
Efficient approximate adders for fpga-based data-paths 112
High speed self-timed pipelined datapath for square root 111
Area-time-power tradeoff in VLSI cellular arrays implementations 110
An embedded machine vision system for an in-line quality check of assembly processes 110
Fast-squarer circuits using 3-bit-scan without overlapping bits 109
Totale 13.658
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Categoria #
all - tutte 121.000
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 121.000
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2021/20221.224 0 0 0 0 155 47 10 278 17 15 248 454
2022/20231.884 200 138 24 221 260 223 7 330 244 72 84 81
2023/2024965 130 48 83 44 44 64 21 81 104 30 82 234
2024/20252.856 91 472 74 119 235 120 96 215 418 113 277 626
2025/20268.971 1.041 433 742 1.013 1.532 548 901 432 642 735 416 536
2026/20272.376 586 216 386 1.187 1 0 0 0 0 0 0 0
Totale 21.708