IRIS
CRUPI, Felice
 Distribuzione geografica
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Continente #
NA - Nord America 6.184
EU - Europa 3.517
AS - Asia 1.162
AF - Africa 172
Continente sconosciuto - Info sul continente non disponibili 16
OC - Oceania 14
SA - Sud America 5
AN - Antartide 1
Totale 11.071
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Nazione #
US - Stati Uniti d'America 6.026
UA - Ucraina 1.463
DE - Germania 983
CN - Cina 491
SE - Svezia 380
IT - Italia 362
SG - Singapore 313
TR - Turchia 212
SN - Senegal 168
CA - Canada 155
FI - Finlandia 101
KR - Corea 62
BE - Belgio 54
AT - Austria 44
GB - Regno Unito 38
CZ - Repubblica Ceca 34
HK - Hong Kong 28
IN - India 19
EU - Europa 16
AU - Australia 14
FR - Francia 14
JP - Giappone 14
NL - Olanda 13
IE - Irlanda 7
RU - Federazione Russa 4
TW - Taiwan 4
BR - Brasile 3
IL - Israele 3
PL - Polonia 3
DZ - Algeria 2
GR - Grecia 2
ID - Indonesia 2
KW - Kuwait 2
LT - Lituania 2
MN - Mongolia 2
MX - Messico 2
RO - Romania 2
SA - Arabia Saudita 2
AE - Emirati Arabi Uniti 1
AM - Armenia 1
BG - Bulgaria 1
BY - Bielorussia 1
CH - Svizzera 1
CL - Cile 1
EC - Ecuador 1
EG - Egitto 1
ES - Italia 1
GS - Georgia del Sud e Isole Sandwich Australi 1
HU - Ungheria 1
IQ - Iraq 1
LK - Sri Lanka 1
LU - Lussemburgo 1
MD - Moldavia 1
MK - Macedonia 1
MO - Macao, regione amministrativa speciale della Cina 1
MY - Malesia 1
NO - Norvegia 1
PA - Panama 1
PT - Portogallo 1
SK - Slovacchia (Repubblica Slovacca) 1
UZ - Uzbekistan 1
VN - Vietnam 1
ZA - Sudafrica 1
Totale 11.071
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Città #
Jacksonville 1.074
Chandler 953
Dearborn 552
Boardman 542
San Mateo 417
Roxbury 239
Lawrence 236
Izmir 206
Singapore 191
Shanghai 190
Dakar 168
Des Moines 149
Ottawa 141
Ann Arbor 122
Ashburn 101
Helsinki 99
Rende 96
Inglewood 91
Cambridge 90
Wilmington 89
New York 87
Beijing 73
Bremen 70
Ogden 68
Brooklyn 61
Grafing 58
Munich 56
Brussels 49
Vienna 36
Brno 30
Seoul 29
Pohang 28
Bari 25
Chicago 24
Cosenza 24
Milan 22
San Francisco 18
West Jordan 18
Falls Church 17
Redwood City 16
Los Angeles 15
Norwalk 15
London 12
Guangzhou 11
Haikou 11
Santa Clara 11
Toronto 11
Vibo Valentia 11
Jinan 10
Seattle 10
Bologna 9
Houston 8
Fort Collins 7
Frankfurt am Main 7
Hangzhou 7
Kumamoto 7
Melbourne 7
Naaldwijk 7
Turin 7
Woodbridge 7
Cedar Knolls 6
Dublin 6
Hong Kong 6
Kilburn 6
Ningbo 6
Rome 6
Berlin 5
Catanzaro 5
Hefei 5
Heze 5
Nanjing 5
Spadola 5
Venice 5
Amsterdam 4
Canberra 4
Catania 4
Celico 4
Edinburgh 4
Gunzenhausen 4
Jinhua 4
Kunming 4
Mountain View 4
Nanchang 4
Shaoxing 4
Shenyang 4
Taipei 4
Washington 4
Wuxi 4
Baranello 3
Falkenstein 3
Fuscaldo 3
Giv‘atayim 3
Hebei 3
Hyderabad 3
Jiaxing 3
Lianyun 3
Mascalucia 3
Osaka 3
Palermo 3
Paris 3
Totale 6.912
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Nome #
A 0.25-V, 5.3-pW Voltage Reference with 25-μV/°C Temperature Coefficient, 140-μV/V Line Sensitivity and 2,200-μm2 Area in 180nm 140
A 0.05 mm², 350 mV, 14 nW Fully-Integrated Temperature Sensor in 180-nm CMOS 137
1/f Noise in Drain and Gate Current of MOSFETs With High-k Gate Stacks 115
A 0.6-to-1.8V CMOS Current Reference with Near-100% Power Utilization 112
Exploiting Silicon Fingerprint for Device Authentication Using CMOS-PUF and ECC 101
A 2.6 nW, 0.45 V Temperature-Compensated Subthreshold CMOS Voltage Reference 96
An Ultralow-Voltage Energy-Efficient Level Shifter 90
Reconfigurable Intelligent Surface-Aided Indoor Radar Monitoring: A Feasibility Study 85
A Methodology to Account for the Finger Interruptions in Solar Cell Performance 83
Assessment of STT-MRAM performance at nanoscaled technology nodes using a device-to-memory simulation framework 83
A Compact Model with Spin-Polarization Asymmetry for Nanoscaled Perpendicular MTJs 80
A Physical Unclonable Function Based on a 2-Transistor Subthreshold Voltage Divider 79
A detailed analysis of the pre-breakdown current fluctuations in thin oxide MOS capacitors 77
Accountability of IoT Devices 76
Transients during pre-breakdown and hard breakdown of thin gate oxides in metal-SiO2-Si capacitors 75
Analytical model for the 1/f noise in the tunneling current through metal-oxide-semiconductor structures 73
Static CMOS Physically Unclonable Function Based on 4T Voltage Divider With 0.6%-1.5% Bit Instability at 0.4-1.8 V Operation in 180 nm 73
A new method for high-sensitivity noise measurements 72
A comparative study of MWT architectures by means of numerical simulations 71
A Variation-Aware Timing Modeling Approach for Write Operation in Hybrid CMOS/STT-MTJ Circuits 70
Simulations and comparisons of basic analog and digital circuit blocks employing Tunnel FETs and conventional FinFETs 70
A comparative study of the oxide breakdown in short-channel nMOSFETs and pMOSFETs stressed in inversion and in accumulation regimes 70
A Defect-Centric perspective on channel hot carrier variability in nMOSFETs 69
Assessment of InAs/AlGaSb Tunnel-FET Virtual Technology Platform for Low-Power Digital Circuits 69
Assessment of STT-MRAMs based on double-barrier MTJs for cache applications by means of a device-to-system level simulation framework 69
A model for current conduction after soft-breakdown 68
Reliability in GaN-based devices for power applications 68
An algorithm for separating multilevel random telegraph signal from 1/f noise 67
Making IoT Services Accountable: A Solution Based on Blockchain and Physically Unclonable Functions 67
Design of a sub-1-V nanopower CMOS current reference 67
A new circuit topology for the realization of very low-noise wide-bandwidth transimpedance amplifier 66
Understanding the Potential and Limitations of Tunnel FETs for Low-Voltage Analog/Mixed-Signal Circuits 65
A Microscopically Accurate Model of Partially Ballistic NanoMOSFETs in Saturation Based on Channel Backscattering 65
A 3.2-pW, 0.2-V Trimming-Less Voltage Reference with 1.4-mV Across-Wafer Total Accuracy 65
A picopower temperature-compensated, subthreshold CMOS voltage reference 64
Benchmarks of a III-V TFET technology platform against the 10-nm CMOS FinFET technology node considering basic arithmentic circuits 64
A methodology to account for the finger non-uniformity in photovoltaic solar cell 64
A portable class of 3-transistor current references with low-power sub-0.5 V operation 64
Low energy/delay overhead level shifter for wide-range voltage conversion 62
A Defect-Centric Analysis of the Temperature Dependence of the Channel Hot Carrier Degradation in nMOSFETs 62
Understanding the impact of point-contact scheme and selective emitter in a c-Si BC-BJ solar cell by full 3D numerical simulations 62
A Backscattering Model Incorporating the Effective Carrier Temperature in Nano-MOSFET 62
A virtual III-V tunnel FET technology platform for ultra-low voltage comparators and level shifters 62
Influence of GaN- and Si 3 N 4 -Passivation layers on the performance of AlGaN/GaN diodes with a gated edge termination 62
Full Model and Characterization of Noise in Operational Amplifier 60
Design of a 3T current reference for low-voltage, low-power operation 60
New insights into the relation between channel hot carrier degradation and oxide breakdown in short channel nMOSFETs 59
Electrical and thermal transient during dielectric breakdown of thin oxides in metal-SiO2-silicon capacitors 58
A model for MOS gate stack quality evaluation based on the gate current 1/f noise 58
Variability-Aware Analysis of Hybrid MTJ/CMOS Circuits by a Micromagnetic-Based Simulation Framework 58
Reliability improvements in AlGaN/GaN schottky barrier diodes with a gated edge termination 58
Benchmarks of a III-V TFET technology platform against the 10-nm CMOS FinFET technology node considering basic arithmetic circuits 57
Chip/Package/Board Co-Simulation Methodology for Crosstalk between DC/DC Converter and ADC Input Channels 57
Dedicated probe system for wafer level noise measurements in MOS devices 56
Performance of current mirror with high-k gate dielectrics 56
Gate-level body biasing for subthreshold logic circuits: analytical modeling and design guidelines 56
Low frequency noise in nMOSFETs with subnanometer EOT hafnium-based gate dielectrics 56
Opto-electrical modelling and optimization study of a novel IBC c-Si solar cell 56
Impact of voltage scaling on STT-MRAMs through a variability-aware simulation framework 56
Design guidelines for a metallization scheme with multiple-emitter contact lines in BC-BJ solar cells 55
A new physically-based model for temperature acceleration of time-to-breakdown 55
A novel characterization tool for the study of dielectric breakdown of ultra-thin oxide MOS structures 55
Ultrasensitive low noise voltage amplifier for spectral analysis 55
Impact of the Emitter Contact Pattern in c-Si BC-BJ Solar Cells by Numerical Simulations 55
Comparative study of drain and gate low-frequency noise in nMOSFETs with hafnium-based gate dielectrics 54
Characterization of interface and oxide traps in Ge pMOSFETs based on DCIV technique 53
A Procedure For Extracting 1/f Noise From Random Telegraph Signals 53
Spin-orbit torque based physical unclonable function 53
Ultrasensitive method for current noise measurements 52
Impact of the variable output resistance on the transient response of LC transmission line CMOS buffers and its model 52
Numerical Simulation and Modeling of Resistive and Recombination Losses in MWT Solar Cells 52
Impact of TFET unidirectionality and ambipolarity on the performance of 6T SRAM cells 52
A novel methodology for sensing the breakdown location and its application to the reliability study of ultrathin Hf-silicate gate dielectrics 52
A variation-aware simulation framework for hybrid CMOS/spintronic circuits 52
A new technique for extracting the MOSFET threshold voltage using noise measurements 51
Exploiting Double-Barrier MTJs for Energy-Efficient Nanoscaled STT-MRAMs 51
Device-to-system level simulation framework for STT-DMTJ based cache memory 51
Electrical Characterization of the Influence of the Annealing Energy Density on Carrier Lifetimes in Germanium 50
Benchmarks of a III-V TFET technology platform against the 10-nm CMOS technology node considering 28T Full-Adders 50
Enhanced sensitivity cross-correlation method for voltage noise measurements 50
Impact of Scaling on Physical Unclonable Function Based on Spin-Orbit Torque 50
Room-temperature single-electron effects in silicon nanocrystal memories 49
Barrier Lowering and Backscattering Extraction in Short-Channel MOSFETs 49
A new method for high sensitivity noise measurements 49
A Robust, High-Speed and Energy-Efficient Ultralow-Voltage Level Shifter 49
Experimental Study of Single-Electron Phenomena in Silicon Nanocrystal Memories 48
Modeling pFET currents after soft breakdown at different gate locations 48
Single-electron program/erase tunnel events in nanocrystal memories 48
Radiation Tolerance of NROM Embedded Products 48
Three-channel amplifier for high-sensitivity voltage noise measurements 48
Evaluating the energy efficiency of stt-mrams based on perpendicular mtjs with double reference layers 48
Adjusting thermal stability in double-barrier MTJ for energy improvement in cryogenic STT-MRAMs 47
Automatic radar-based 2-D localization exploiting vital signs signatures 47
Impact of the interfacial layer on the low-frequency noise (1/f) behavior of MOSFETs with advanced gate stacks 47
How to Enlarge the Bandwidth without Increasing the Noise in Op-Amp based Transimpedance Amplifier 47
A tool to support harbor terminals design 47
Detection and classification of single-electron jumps in Si nanocrystal memories 47
Mixed Tunnel-FET/MOSFET Level Shifters: A New Proposal to Extend the Tunnel-FET Application Domain 46
Compact Modeling of Perpendicular STT-MTJs with Double Reference Layers 46
Design of a 75 nW, 0.5 V Subthreshold CMOS Operational Amplifier 46
Totale 6.279
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Categoria #
all - tutte 87.275
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 87.275
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2019/20201.694 0 0 0 223 142 587 119 244 25 24 231 99
2020/20211.732 290 5 222 235 10 232 16 249 24 231 17 201
2021/20222.150 36 153 7 160 236 78 22 490 33 46 330 559
2022/20232.271 420 171 35 280 330 200 1 311 268 67 90 98
2023/20241.602 166 130 97 63 119 149 105 147 143 82 73 328
2024/2025802 125 571 66 40 0 0 0 0 0 0 0 0
Totale 11.301