IRIS
CRUPI, Felice
 Distribuzione geografica
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Continente #
NA - Nord America 6.211
EU - Europa 3.797
AS - Asia 1.504
AF - Africa 172
Continente sconosciuto - Info sul continente non disponibili 16
OC - Oceania 14
SA - Sud America 6
AN - Antartide 1
Totale 11.721
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Nazione #
US - Stati Uniti d'America 6.053
UA - Ucraina 1.463
DE - Germania 1.060
CN - Cina 589
SG - Singapore 548
IT - Italia 381
SE - Svezia 380
FI - Finlandia 255
TR - Turchia 215
SN - Senegal 168
CA - Canada 155
KR - Corea 62
BE - Belgio 54
AT - Austria 44
GB - Regno Unito 38
CZ - Repubblica Ceca 34
HK - Hong Kong 30
NL - Olanda 29
IN - India 19
FR - Francia 18
EU - Europa 16
AU - Australia 14
JP - Giappone 14
IE - Irlanda 10
RU - Federazione Russa 9
TW - Taiwan 7
BR - Brasile 4
IL - Israele 3
PL - Polonia 3
BG - Bulgaria 2
DZ - Algeria 2
ES - Italia 2
GR - Grecia 2
ID - Indonesia 2
IQ - Iraq 2
KW - Kuwait 2
LT - Lituania 2
MN - Mongolia 2
MX - Messico 2
RO - Romania 2
SA - Arabia Saudita 2
AE - Emirati Arabi Uniti 1
AM - Armenia 1
BY - Bielorussia 1
CH - Svizzera 1
CL - Cile 1
EC - Ecuador 1
EG - Egitto 1
GS - Georgia del Sud e Isole Sandwich Australi 1
HU - Ungheria 1
LK - Sri Lanka 1
LU - Lussemburgo 1
MD - Moldavia 1
MK - Macedonia 1
MO - Macao, regione amministrativa speciale della Cina 1
MY - Malesia 1
NO - Norvegia 1
PA - Panama 1
PT - Portogallo 1
SK - Slovacchia (Repubblica Slovacca) 1
UZ - Uzbekistan 1
VN - Vietnam 1
ZA - Sudafrica 1
Totale 11.721
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Città #
Jacksonville 1.074
Chandler 953
Dearborn 552
Boardman 543
San Mateo 417
Singapore 414
Helsinki 253
Roxbury 239
Lawrence 236
Izmir 206
Shanghai 196
Dakar 168
Des Moines 149
Ottawa 141
Ann Arbor 122
Ashburn 105
Rende 96
Inglewood 91
Cambridge 90
Wilmington 89
New York 87
Beijing 78
Bremen 70
Falkenstein 70
Ogden 68
Munich 63
Brooklyn 61
Grafing 58
Brussels 49
Vienna 36
Brno 30
Seoul 29
Pohang 28
Bari 25
Chicago 24
Cosenza 24
Milan 22
Amsterdam 19
San Francisco 18
West Jordan 18
Falls Church 17
Redwood City 16
Los Angeles 15
Norwalk 15
Guangzhou 13
London 12
Haikou 11
Jinan 11
Santa Clara 11
Toronto 11
Vibo Valentia 11
Bologna 10
Rome 10
Seattle 10
Dublin 9
Catanzaro 8
Frankfurt am Main 8
Hong Kong 8
Houston 8
Fort Collins 7
Hangzhou 7
Kumamoto 7
Melbourne 7
Naaldwijk 7
Turin 7
Woodbridge 7
Cedar Knolls 6
Hefei 6
Kilburn 6
Nanjing 6
Ningbo 6
Wuxi 6
Berlin 5
Heze 5
Jinhua 5
Shenyang 5
Spadola 5
Taipei 5
Venice 5
Canberra 4
Catania 4
Celico 4
Edinburgh 4
Gunzenhausen 4
Kunming 4
Mountain View 4
Nanchang 4
Paris 4
Shaoxing 4
Washington 4
Xi'an 4
Baranello 3
Changsha 3
Fuscaldo 3
Giv‘atayim 3
Hebei 3
Hyderabad 3
Istanbul 3
Jiaxing 3
Lianyun 3
Totale 7.420
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Nome #
A 0.25-V, 5.3-pW Voltage Reference with 25-μV/°C Temperature Coefficient, 140-μV/V Line Sensitivity and 2,200-μm2 Area in 180nm 149
A 0.05 mm², 350 mV, 14 nW Fully-Integrated Temperature Sensor in 180-nm CMOS 148
A 0.6-to-1.8V CMOS Current Reference with Near-100% Power Utilization 130
1/f Noise in Drain and Gate Current of MOSFETs With High-k Gate Stacks 122
Exploiting Silicon Fingerprint for Device Authentication Using CMOS-PUF and ECC 113
A 2.6 nW, 0.45 V Temperature-Compensated Subthreshold CMOS Voltage Reference 104
An Ultralow-Voltage Energy-Efficient Level Shifter 97
Reconfigurable Intelligent Surface-Aided Indoor Radar Monitoring: A Feasibility Study 90
A Methodology to Account for the Finger Interruptions in Solar Cell Performance 87
A Physical Unclonable Function Based on a 2-Transistor Subthreshold Voltage Divider 87
Assessment of STT-MRAM performance at nanoscaled technology nodes using a device-to-memory simulation framework 86
A Compact Model with Spin-Polarization Asymmetry for Nanoscaled Perpendicular MTJs 84
Accountability of IoT Devices 83
A detailed analysis of the pre-breakdown current fluctuations in thin oxide MOS capacitors 81
Analytical model for the 1/f noise in the tunneling current through metal-oxide-semiconductor structures 80
Static CMOS Physically Unclonable Function Based on 4T Voltage Divider With 0.6%-1.5% Bit Instability at 0.4-1.8 V Operation in 180 nm 79
Transients during pre-breakdown and hard breakdown of thin gate oxides in metal-SiO2-Si capacitors 77
A new method for high-sensitivity noise measurements 77
Reliability in GaN-based devices for power applications 77
Simulations and comparisons of basic analog and digital circuit blocks employing Tunnel FETs and conventional FinFETs 75
A Variation-Aware Timing Modeling Approach for Write Operation in Hybrid CMOS/STT-MTJ Circuits 74
A comparative study of the oxide breakdown in short-channel nMOSFETs and pMOSFETs stressed in inversion and in accumulation regimes 74
A comparative study of MWT architectures by means of numerical simulations 74
An algorithm for separating multilevel random telegraph signal from 1/f noise 73
A Defect-Centric perspective on channel hot carrier variability in nMOSFETs 73
A new circuit topology for the realization of very low-noise wide-bandwidth transimpedance amplifier 73
A model for current conduction after soft-breakdown 72
Assessment of InAs/AlGaSb Tunnel-FET Virtual Technology Platform for Low-Power Digital Circuits 72
A Microscopically Accurate Model of Partially Ballistic NanoMOSFETs in Saturation Based on Channel Backscattering 71
Making IoT Services Accountable: A Solution Based on Blockchain and Physically Unclonable Functions 71
Assessment of STT-MRAMs based on double-barrier MTJs for cache applications by means of a device-to-system level simulation framework 71
A portable class of 3-transistor current references with low-power sub-0.5 V operation 69
Design of a sub-1-V nanopower CMOS current reference 69
Understanding the Potential and Limitations of Tunnel FETs for Low-Voltage Analog/Mixed-Signal Circuits 68
A methodology to account for the finger non-uniformity in photovoltaic solar cell 68
A 3.2-pW, 0.2-V Trimming-Less Voltage Reference with 1.4-mV Across-Wafer Total Accuracy 68
Benchmarks of a III-V TFET technology platform against the 10-nm CMOS FinFET technology node considering basic arithmentic circuits 67
A Backscattering Model Incorporating the Effective Carrier Temperature in Nano-MOSFET 67
A virtual III-V tunnel FET technology platform for ultra-low voltage comparators and level shifters 67
Influence of GaN- and Si 3 N 4 -Passivation layers on the performance of AlGaN/GaN diodes with a gated edge termination 67
A picopower temperature-compensated, subthreshold CMOS voltage reference 66
Low energy/delay overhead level shifter for wide-range voltage conversion 66
A Defect-Centric Analysis of the Temperature Dependence of the Channel Hot Carrier Degradation in nMOSFETs 66
Dedicated probe system for wafer level noise measurements in MOS devices 65
Reliability improvements in AlGaN/GaN schottky barrier diodes with a gated edge termination 65
Full Model and Characterization of Noise in Operational Amplifier 64
Understanding the impact of point-contact scheme and selective emitter in a c-Si BC-BJ solar cell by full 3D numerical simulations 64
Variability-Aware Analysis of Hybrid MTJ/CMOS Circuits by a Micromagnetic-Based Simulation Framework 64
New insights into the relation between channel hot carrier degradation and oxide breakdown in short channel nMOSFETs 63
Design of a 3T current reference for low-voltage, low-power operation 63
Low frequency noise in nMOSFETs with subnanometer EOT hafnium-based gate dielectrics 62
A model for MOS gate stack quality evaluation based on the gate current 1/f noise 62
Performance of current mirror with high-k gate dielectrics 61
Ultrasensitive low noise voltage amplifier for spectral analysis 61
Gate-level body biasing for subthreshold logic circuits: analytical modeling and design guidelines 60
Comparative study of drain and gate low-frequency noise in nMOSFETs with hafnium-based gate dielectrics 60
Electrical and thermal transient during dielectric breakdown of thin oxides in metal-SiO2-silicon capacitors 60
Opto-electrical modelling and optimization study of a novel IBC c-Si solar cell 60
Chip/Package/Board Co-Simulation Methodology for Crosstalk between DC/DC Converter and ADC Input Channels 60
Benchmarks of a III-V TFET technology platform against the 10-nm CMOS FinFET technology node considering basic arithmetic circuits 59
Impact of the variable output resistance on the transient response of LC transmission line CMOS buffers and its model 58
Design guidelines for a metallization scheme with multiple-emitter contact lines in BC-BJ solar cells 58
Impact of voltage scaling on STT-MRAMs through a variability-aware simulation framework 58
A variation-aware simulation framework for hybrid CMOS/spintronic circuits 58
Spin-orbit torque based physical unclonable function 58
A new physically-based model for temperature acceleration of time-to-breakdown 57
Characterization of interface and oxide traps in Ge pMOSFETs based on DCIV technique 57
A novel characterization tool for the study of dielectric breakdown of ultra-thin oxide MOS structures 57
A Procedure For Extracting 1/f Noise From Random Telegraph Signals 57
Impact of the Emitter Contact Pattern in c-Si BC-BJ Solar Cells by Numerical Simulations 57
Ultrasensitive method for current noise measurements 56
Enhanced sensitivity cross-correlation method for voltage noise measurements 56
Radiation Tolerance of NROM Embedded Products 55
A Robust, High-Speed and Energy-Efficient Ultralow-Voltage Level Shifter 55
A new technique for extracting the MOSFET threshold voltage using noise measurements 54
Numerical Simulation and Modeling of Resistive and Recombination Losses in MWT Solar Cells 54
Impact of TFET unidirectionality and ambipolarity on the performance of 6T SRAM cells 54
A novel methodology for sensing the breakdown location and its application to the reliability study of ultrathin Hf-silicate gate dielectrics 54
Benchmarks of a III-V TFET technology platform against the 10-nm CMOS technology node considering 28T Full-Adders 53
Room-temperature single-electron effects in silicon nanocrystal memories 53
A new method for high sensitivity noise measurements 53
Exploiting Double-Barrier MTJs for Energy-Efficient Nanoscaled STT-MRAMs 53
Device-to-system level simulation framework for STT-DMTJ based cache memory 53
Automatic radar-based 2-D localization exploiting vital signs signatures 52
Electrical Characterization of the Influence of the Annealing Energy Density on Carrier Lifetimes in Germanium 52
Impact of the interfacial layer on the low-frequency noise (1/f) behavior of MOSFETs with advanced gate stacks 52
Three-channel amplifier for high-sensitivity voltage noise measurements 52
Barrier Lowering and Backscattering Extraction in Short-Channel MOSFETs 52
Detection and classification of single-electron jumps in Si nanocrystal memories 52
Impact of Scaling on Physical Unclonable Function Based on Spin-Orbit Torque 52
Experimental Study of Single-Electron Phenomena in Silicon Nanocrystal Memories 51
Modeling pFET currents after soft breakdown at different gate locations 51
Single-electron program/erase tunnel events in nanocrystal memories 51
Adjusting thermal stability in double-barrier MTJ for energy improvement in cryogenic STT-MRAMs 50
How to Enlarge the Bandwidth without Increasing the Noise in Op-Amp based Transimpedance Amplifier 50
Design of a 75 nW, 0.5 V Subthreshold CMOS Operational Amplifier 50
Evaluating the energy efficiency of stt-mrams based on perpendicular mtjs with double reference layers 50
Noise as a probe of the charge transport mechanisms through thin oxides in mos structures 49
A tool to support harbor terminals design 49
Mixed Tunnel-FET/MOSFET Level Shifters: A New Proposal to Extend the Tunnel-FET Application Domain 48
Totale 6.726
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Categoria #
all - tutte 94.545
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 94.545
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2019/20201.329 0 0 0 0 0 587 119 244 25 24 231 99
2020/20211.732 290 5 222 235 10 232 16 249 24 231 17 201
2021/20222.150 36 153 7 160 236 78 22 490 33 46 330 559
2022/20232.271 420 171 35 280 330 200 1 311 268 67 90 98
2023/20241.602 166 130 97 63 119 149 105 147 143 82 73 328
2024/20251.452 125 571 66 200 176 314 0 0 0 0 0 0
Totale 11.951